Kaushik; Naveen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kaushik; Naveen.The latest application filed is for "integrated assemblies and methods of forming integrated assemblies".

Company Profile

1.3.12

Kaushik; Naveen - Boise ID
KAUSHIK; Naveen - Noida IN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods of forming apparatuses including air gaps between conductive lines and related apparatuses, memory devices, and electronic systems Grant 11,456,208 - Gupta , et al. September 27, 2	2022-09-27
Integrated Assemblies and Methods of Forming Integrated Assemblies App 20220238546 - Gupta; Sidhartha ; et al.	2022-07-28
Microelectronic Devices With Vertically Recessed Channel Structures And Discrete, Spaced Inter-slit Structures, And Related Methods And Systems App 20220238548 - Liu; Haitao ; et al.	2022-07-28
Methods Of Forming Microelectronic Devices, And Related Microelectronic Devices, Memory Devices, And Electronic Systems App 20220238431 - Kaushik; Naveen ; et al.	2022-07-28
Integrated Assemblies Having Conductive-Shield-Structures Between Linear-Conductive-Structures App 20220181254 - Kaushik; Naveen ; et al.	2022-06-09
Integrated assemblies having conductive-shield-structures between linear-conductive-structures Grant 11,302,628 - Kaushik , et al. April 12, 2	2022-04-12
Capacitor In A Three-dimensional Memory Structure App 20220068796 - Guo; Xiaojiang ; et al.	2022-03-03
Methods Of Forming Apparatuses Including Air Gaps Between Conductive Lines And Related Apparatuses, Memory Devices, And Electronic Systems App 20220051930 - Gupta; Sidhartha ; et al.	2022-02-17
Integrated Assemblies Having Void Regions Between Digit Lines and Conductive Structures, and Methods of Forming Integrated Assemblies App 20220036927 - Kaushik; Naveen ; et al.	2022-02-03
Integrated assemblies having void regions between digit lines and conductive structures, and methods of forming integrated assemblies Grant 11,195,560 - Kaushik , et al. December 7, 2	2021-12-07
Memory Device Including Data Lines On Multiple Device Levels App 20210193570 - Moschiano; Violante ; et al.	2021-06-24
Semiconductor Structure Formation App 20210183865 - Neelapala; Venkata Naveen Kumar ; et al.	2021-06-17
Integrated Assemblies Having Void Regions Between Digit Lines and Conductive Structures, and Methods of Forming Integrated Assemblies App 20210174840 - Kaushik; Naveen ; et al.	2021-06-10
System And Method For Providing Personalized News Feed To A User App 20180336282 - PANDEY; Anunay ; et al.	2018-11-22

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