Katada; Mitsutaka

Patent Applications and Registrations

Patent applications and USPTO patent grants for Katada; Mitsutaka.The latest application filed is for "soi (silicon on insulator) structure semiconductor device and method of manufacturing the same".

Company Profile

0.13.6

Katada; Mitsutaka - Hoi-gun N/A JP
Katada; Mitsutaka - Toyokawa JP
Katada; Mitsutaka - Toyokawa-city JP
Katada; Mitsutaka - Kariya JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same Grant 8,410,573 - Ohtsuki , et al. April 2, 2	2013-04-02
Semiconductor device including a plurality of memory cells with no difference in erasing properties Grant 8,035,154 - Naruse , et al. October 11, 2	2011-10-11
Soi (silicon On Insulator) Structure Semiconductor Device And Method Of Manufacturing The Same App 20100264510 - Ohtsuki; Hiroshi ; et al.	2010-10-21
Nonvolatile semiconductor memory device and method of erasing and programming the same Grant 7,796,442 - Katada , et al. September 14, 2	2010-09-14
Semiconductor device, wiring of semiconductor device, and method of forming wiring Grant 7,642,653 - Kuzuhara , et al. January 5, 2	2010-01-05
Semiconductor device including a plurality of memory cells and method of manufacturing semiconductor device App 20090114974 - Naruse; Takayoshi ; et al.	2009-05-07
Semiconductor device having multiple wiring layers App 20080258304 - KOMURA; Atsushi ; et al.	2008-10-23
Nonvolatile semiconductor memory device and method of erasing and programming the same App 20080239817 - Katada; Mitsutaka ; et al.	2008-10-02
Semiconductor device, wiring of semiconductor device, and method of forming wiring App 20080105947 - Kuzuhara; Takeshi ; et al.	2008-05-08
EEPROM and EEPROM manufacturing method Grant 6,914,288 - Itou , et al. July 5, 2	2005-07-05
EEPROM and EEPROM manufacturing method App 20040070022 - Itou, Hiroyasu ; et al.	2004-04-15
Semiconductor device and fabrication process thereof Grant 6,337,249 - Yamane , et al. January 8, 2	2002-01-08
Method of fabricating a MIS transistor Grant 5,753,556 - Katada , et al. May 19, 1	1998-05-19
Enhancement-type semiconductor having reduced leakage current Grant 5,675,167 - Yamane , et al. October 7, 1	1997-10-07
Process for fabricating a complementary MIS transistor Grant 5,532,176 - Katada , et al. July 2, 1	1996-07-02
Method of bonding semiconductor substrates Grant 5,383,993 - Katada , et al. January 24, 1	1995-01-24
Complementary MIS transistor and a fabrication process thereof Grant 5,334,870 - Katada , et al. August 2, 1	1994-08-02
Method of producing semiconductor substrate having dielectric separation region Grant 5,223,450 - Fujino , et al. June 29, 1	1993-06-29

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