KARUNANIDHI; Sugandhini
Patent Applications and Registrations
Patent applications and USPTO patent grants for KARUNANIDHI; Sugandhini.The latest application filed is for "reducing time to design integrated circuits including performing electro-migration check".
- KARUNANIDHI; Sugandhini - Bangalore IN
| Patent | Date |
|---|---|
| Reducing Time To Design Integrated Circuits Including Performing Electro-migration Check App 20070079264 - Goda; Ananth Somayaji ; et al. | 2007-04-05 |
| Reducing time to design integrated circuits including performing electro-migration check Grant 7,197,730 - Goda , et al. March 27, 2 | 2007-03-27 |
| Estimating current density parameters on signal leads of an integrated circuit Grant 7,043,705 - Somayaji , et al. May 9, 2 | 2006-05-09 |
| Estimating current density parameters on signal leads of an integrated circuit App 20050010881 - Somayaji, Ananth G. ; et al. | 2005-01-13 |
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