Kartschoke; Paul David
Patent Applications and Registrations
Patent applications and USPTO patent grants for Kartschoke; Paul David.The latest application filed is for "double-sided integrated circuit chips".
- Kartschoke; Paul David - Williston VT
| Patent | Date |
|---|---|
| Double-sided integrated circuit chips Grant 8,471,306 - Bernstein , et al. June 25, 2 | 2013-06-25 |
| Double-sided integrated circuit chips Grant 8,421,126 - Bernstein , et al. April 16, 2 | 2013-04-16 |
| Structures for semiconductor structures with error detection and correction Grant 8,146,046 - Dalton , et al. March 27, 2 | 2012-03-27 |
| Double-sided Integrated Circuit Chips App 20110302542 - Bernstein; Kerry ; et al. | 2011-12-08 |
| Double-sided Integrated Circuit Chips App 20110241082 - Bernstein; Kerry ; et al. | 2011-10-06 |
| Double-sided integrated circuit chips Grant 8,013,342 - Bernstein , et al. September 6, 2 | 2011-09-06 |
| Double-sided integrated circuit chips Grant 7,989,312 - Bernstein , et al. August 2, 2 | 2011-08-02 |
| Dual wired integrated circuit chips Grant 7,960,245 - Bernstein , et al. June 14, 2 | 2011-06-14 |
| Dual wired integrated circuit chips Grant 7,939,914 - Bernstein , et al. May 10, 2 | 2011-05-10 |
| Double-sided integrated circuit chips Grant 7,670,927 - Bernstein , et al. March 2, 2 | 2010-03-02 |
| Double-sided Integrated Circuit Chips App 20100044759 - Bernstein; Kerry ; et al. | 2010-02-25 |
| Double-sided Integrated Circuit Chips App 20090121260 - Bernstein; Kerry ; et al. | 2009-05-14 |
| Dual Wired Integrated Circuit Chips App 20090121287 - Bernstein; Kerry ; et al. | 2009-05-14 |
| Error detection and correction in semiconductor structures Grant 7,526,698 - Dalton , et al. April 28, 2 | 2009-04-28 |
| Design Structures For Semiconductor Structures With Error Detection And Correction App 20080216031 - Dalton; Timothy Joseph ; et al. | 2008-09-04 |
| Dual Wired Integrated Circuit Chips App 20080213948 - Bernstein; Kerry ; et al. | 2008-09-04 |
| Dual Wired Integrated Circuit Chips App 20080128812 - Bernstein; Kerry ; et al. | 2008-06-05 |
| Dual wired integrated circuit chips Grant 7,381,627 - Bernstein , et al. June 3, 2 | 2008-06-03 |
| Double-sided Integrated Circuit Chips App 20070267723 - Bernstein; Kerry ; et al. | 2007-11-22 |
| Dual Wired Integrated Circuit Chips App 20070267698 - Bernstein; Kerry ; et al. | 2007-11-22 |
| Dual wired integrated circuit chips Grant 7,285,477 - Bernstein , et al. October 23, 2 | 2007-10-23 |
| Error Detection And Correction In Semiconductor Structures App 20070241398 - Dalton; Timothy Joseph ; et al. | 2007-10-18 |
| Self-timed low power ratio-logic system having an input sensing circuit Grant 5,867,038 - Kartschoke , et al. February 2, 1 | 1999-02-02 |
| Method of power reduction in pla's Grant 5,712,790 - Ditlow , et al. January 27, 1 | 1998-01-27 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 