loadpatents
name:-0.028357982635498
name:-0.024755001068115
name:-0.00051212310791016
Kartschoke; Paul D. Patent Filings

Kartschoke; Paul D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kartschoke; Paul D..The latest application filed is for "reducing repeater power".

Company Profile
0.24.24
  • Kartschoke; Paul D. - Williston VT
  • Kartschoke; Paul D - Williston VT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Reducing repeater power
Grant 9,256,705 - Kartschoke , et al. February 9, 2
2016-02-09
Reducing repeater power
Grant 9,223,918 - Kartschoke , et al. December 29, 2
2015-12-29
Test structure and methodology for three-dimensional semiconductor structures
Grant 8,729,549 - Bernstein , et al. May 20, 2
2014-05-20
Double-sided integrated circuit chips
Grant 8,689,152 - Bernstein , et al. April 1, 2
2014-04-01
Reducing Repeater Power
App 20140088948 - Kartschoke; Paul D. ;   et al.
2014-03-27
Reducing Repeater Power
App 20130275110 - Kartschoke; Paul D. ;   et al.
2013-10-17
Double-sided Integrated Circuit Chips
App 20130179853 - Bernstein; Kerry ;   et al.
2013-07-11
Test structure and methodology for three-dimensional semiconductor structures
Grant 8,294,149 - Bernstein , et al. October 23, 2
2012-10-23
Test Structure And Methodology For Three-dimensional Semiconductor Structures
App 20120262197 - Bernstein; Kerry ;   et al.
2012-10-18
Test Structure And Methodology For Three-dimensional Semiconductor Structures
App 20120264241 - Bernstein; Kerry ;   et al.
2012-10-18
Design structure for performing iterative synthesis of an integrated circuit design to attain power closure
Grant 7,886,253 - Charlebois , et al. February 8, 2
2011-02-08
Power gating logic cones
Grant 7,873,923 - Charlebois , et al. January 18, 2
2011-01-18
Method and system for achieving power optimization in a hierarchical netlist
Grant 7,836,418 - Binder , et al. November 16, 2
2010-11-16
Error correcting logic system
Grant 7,642,813 - Bernstein , et al. January 5, 2
2010-01-05
Method And System For Achieving Power Optimization In A Hierarchical Netlist
App 20090241079 - BINDER; William A. ;   et al.
2009-09-24
Power Gating Logic Cones
App 20090222772 - Charlebois; Steven E ;   et al.
2009-09-03
Iterative synthesis of an integrated circuit design for attaining power closure while maintaining existing design constraints
Grant 7,539,968 - Charlebois , et al. May 26, 2
2009-05-26
Test Structure And Methodology For Three-dimensional Semiconductor Structures
App 20090114913 - Bernstein; Kerry ;   et al.
2009-05-07
Structure For Performing Iterative Synthesis Of An Integrated Circuit Design To Attain Power Closure
App 20090100398 - Charlebois; Steven E. ;   et al.
2009-04-16
Voltage droop dynamic recovery
Grant 7,480,810 - Gonzalez , et al. January 20, 2
2009-01-20
Error Correcting Logic System
App 20090002015 - Bernstein; Kerry ;   et al.
2009-01-01
Error correcting logic system
Grant 7,471,115 - Bernstein , et al. December 30, 2
2008-12-30
Iterative Synthesis Of An Integrated Circuit Design For Attaining Power Closure While Maintaining Existing Design Constraints
App 20080307383 - Charlebois; Steven E. ;   et al.
2008-12-11
Error Correcting Logic System
App 20080048711 - Bernstein; Kerry ;   et al.
2008-02-28
Error correcting logic system
Grant 7,336,102 - Bernstein , et al. February 26, 2
2008-02-26
Voltage Droop Dynamic Recovery
App 20070192636 - Gonzalez; Christopher J. ;   et al.
2007-08-16
Method and apparatus for dynamically allocating processors
Grant 7,249,358 - Emma , et al. July 24, 2
2007-07-24
Method of reducing instantaneous current draw and an integrated circuit made thereby
Grant 7,194,714 - Kartschoke , et al. March 20, 2
2007-03-20
Method of dynamically controlling cache size
Grant 7,127,560 - Cohen , et al. October 24, 2
2006-10-24
Method for preventing circuit failures due to gate oxide leakage
Grant 7,127,689 - Kartschoke , et al. October 24, 2
2006-10-24
Detector for alpha particle or cosmic ray
Grant 7,057,180 - Fifield , et al. June 6, 2
2006-06-06
Error correcting logic system
App 20060026457 - Bernstein; Kerry ;   et al.
2006-02-02
Method For Preventing Circuit Failures Due To Gate Oxide Leakage
App 20050278662 - Kartschoke, Paul D. ;   et al.
2005-12-15
Methodology for fixing Qcrit at design timing impact
Grant 6,954,916 - Bernstein , et al. October 11, 2
2005-10-11
Methods and apparatus for employing feedback body control in cross-coupled inverters
Grant 6,891,419 - Kartschoke , et al. May 10, 2
2005-05-10
Method Of Reducing Instantaneous Current Draw And An Integrated Circuit Made Thereby
App 20050086620 - Kartschoke, Paul D. ;   et al.
2005-04-21
Method Of Dynamically Controlling Cache Size
App 20050080994 - Cohen, Erwin B. ;   et al.
2005-04-14
Methods And Apparatus For Employing Feedback Body Control In Cross-coupled Inverters
App 20050024113 - Kartschoke, Paul D. ;   et al.
2005-02-03
Detector For Alpha Particle Or Cosmic Ray
App 20050012045 - Fifield, John A. ;   et al.
2005-01-20
METHODOLOGY FOR FIXING Qcrit AT DESIGN TIMING IMPACT
App 20040267514 - Bernstein, Kerry ;   et al.
2004-12-30
Apparatus for reducing soft errors in dynamic circuits
Grant 6,794,901 - Bernstein , et al. September 21, 2
2004-09-21
A Method and Apparatus For Dynamically Allocating Process Resources
App 20040154017 - Emma, Philip G ;   et al.
2004-08-05
A Method and Apparatus For Dynamically Allocating Processors
App 20040133892 - Emma, Philip G ;   et al.
2004-07-08
Apparatus for reducing soft errors in dynamic circuits
App 20040041590 - Bernstein, Kerry ;   et al.
2004-03-04
Superscalar instruction pipeline using alignment logic responsive to boundary identification logic for aligning and appending variable length instructions to instructions stored in cache
Grant 5,625,787 - Mahin , et al. April 29, 1
1997-04-29

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