Karkhanis; Tejas S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Karkhanis; Tejas S..The latest application filed is for "power management for systems on a chip".

Company Profile

0.5.4

Karkhanis; Tejas S. - White Plains NY US
Karkhanis; Tejas S. - Madison WI

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Power management for systems on a chip Grant 8,892,921 - Cher , et al. November 18, 2	2014-11-18
Power management for systems on a chip Grant 8,312,305 - Cher , et al. November 13, 2	2012-11-13
Power Management For Systems On A Chip App 20120284542 - CHER; CHEN-YONG ; et al.	2012-11-08
Power Management for Systems On a Chip App 20110191603 - Cher; Chen-Yong ; et al.	2011-08-04
Architectural level throughput based power modeling methodology and apparatus for pervasively clock-gated processor cores Grant 7,818,696 - Bose , et al. October 19, 2	2010-10-19
Architectural Level Throughput Based Power Modeling Methodology and Apparatus for Pervasively Clock-Gated Processor Cores App 20080027664 - Bose; Pradip ; et al.	2008-01-31
Architectural level throughput based power modeling methodology and apparatus for pervasively clock-gated processor cores Grant 7,249,331 - Bose , et al. July 24, 2	2007-07-24
Architectural level throughput based power modeling methodology and apparatus for pervasively clock-gated processor cores App 20060080625 - Bose; Pradip ; et al.	2006-04-13

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