loadpatents
name:-0.010539054870605
name:-0.021939992904663
name:-0.00068497657775879
Kariat; Vinod Patent Filings

Kariat; Vinod

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kariat; Vinod.The latest application filed is for "method and apparatus for multi-die thermal analysis".

Company Profile
0.28.10
  • Kariat; Vinod - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Static timing analysis of integrated circuit designs with flexible noise and delay models of circuit stages
Grant 9,129,078 - Keller , et al. September 8, 2
2015-09-08
Static timing analysis methods for integrated circuit designs using a multi-CCC current source model
Grant 8,966,421 - Kariat , et al. February 24, 2
2015-02-24
Method and apparatus for multi-die thermal analysis
Grant 8,694,934 - Pramono , et al. April 8, 2
2014-04-08
Methods, systems, and apparatus for timing and signal integrity analysis of integrated circuits with semiconductor process variations
Grant 8,631,369 - Kariat , et al. January 14, 2
2014-01-14
Flexible noise and delay modeling of circuit stages for static timing analysis of integrated circuit designs
Grant 8,595,669 - Keller , et al. November 26, 2
2013-11-26
Method and apparatus for multi-die thermal analysis
Grant 8,566,760 - Pramono , et al. October 22, 2
2013-10-22
Method and apparatus for thermal analysis of through-silicon via (TSV)
Grant 8,543,952 - Kariat , et al. September 24, 2
2013-09-24
Concurrent noise and delay modeling of circuit stages for static timing analysis of integrated circuit designs
Grant 8,543,954 - Keller , et al. September 24, 2
2013-09-24
Multi-CCC current source models and static timing analysis methods for integrated circuit designs
Grant 8,533,644 - Kariat , et al. September 10, 2
2013-09-10
Sensitivity and static timing analysis for integrated circuit designs using a multi-CCC current source model
Grant 8,516,420 - Kariat , et al. August 20, 2
2013-08-20
Method and apparatus for thermal analysis
Grant 8,504,958 - Kariat , et al. August 6, 2
2013-08-06
Method And Apparatus For Multi-die Thermal Analysis
App 20120304137 - Pramono; Eddy ;   et al.
2012-11-29
Method And Apparatus For Multi-die Thermal Analysis
App 20120297357 - Pramono; Eddy ;   et al.
2012-11-22
Method And Apparatus For Thermal Analysis Of Through-silicon Via (tsv)
App 20120210285 - Kariat; Vinod ;   et al.
2012-08-16
Method and apparatus for multi-die thermal analysis
Grant 8,201,113 - Pramono , et al. June 12, 2
2012-06-12
Method And Apparatus For Thermal Analysis
App 20120102449 - Kariat; Vinod ;   et al.
2012-04-26
Method and apparatus for thermal analysis
Grant 8,104,007 - Kariat , et al. January 24, 2
2012-01-24
Method and apparatus for thermal analysis of through-silicon via (TSV)
Grant 8,103,996 - Kariat , et al. January 24, 2
2012-01-24
Method and apparatus for thermal analysis
Grant 8,104,006 - Kariat , et al. January 24, 2
2012-01-24
Method to produce an electrical model of an integrated circuit substrate and related system and article of manufacture
Grant 7,900,166 - Kariat , et al. March 1, 2
2011-03-01
Timing and signal integrity analysis of integrated circuits with semiconductor process variations
Grant 7,882,471 - Kariat , et al. February 1, 2
2011-02-01
Method and apparatus for substrate noise analysis using substrate tile model and tile grid
Grant 7,877,713 - Kariat , et al. January 25, 2
2011-01-25
Method And Apparatus For Multi-die Thermal Analysis
App 20100023903 - Pramono; Eddy ;   et al.
2010-01-28
Method And Apparatus For Thermal Analysis Of Through-silicon Via (tsv)
App 20090319965 - Kariat; Vinod ;   et al.
2009-12-24
Method And Apparatus For Thermal Analysis
App 20090319964 - Kariat; Vinod ;   et al.
2009-12-24
Method And Apparatus For Thermal Analysis
App 20090199140 - Kariat; Vinod ;   et al.
2009-08-06
Method To Produce Substrate Noise Model And Related System And Article Of Manufacture
App 20090006065 - KARIAT; Vinod ;   et al.
2009-01-01
Method And Apparatus For Substrate Noise Analysis Using Substrate Tile Model And Tile Grid
App 20090007032 - KARIAT; Vinod ;   et al.
2009-01-01
Static noise analysis with noise window estimation and propagation
Grant 6,836,873 - Tseng , et al. December 28, 2
2004-12-28

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