loadpatents
Patent applications and USPTO patent grants for Karavakis; Konstantine.The latest application filed is for "process for forming traces on a catalytic laminate".
Patent | Date |
---|---|
Circuit board using non-catalytic laminate with catalytic adhesive overlay Grant 10,959,329 - Bahl , et al. March 23, 2 | 2021-03-23 |
Process For Forming Traces on a Catalytic Laminate App 20210051804 - BAHL; Kenneth S. ;   et al. | 2021-02-18 |
Catalytic Laminate with Conductive Traces formed during Lamination App 20210022252 - BAHL; Kenneth S ;   et al. | 2021-01-21 |
Circuit Board using non-catalytic laminate with catalytic adhesive overlay App 20200404785 - BAHL; Kenneth S. ;   et al. | 2020-12-24 |
Systems and Methods of Manufacturing Circuit Boards App 20200389980 - Karavakis; Konstantine ;   et al. | 2020-12-10 |
Semi-Additive Process for Printed Circuit Boards App 20200389983 - BAHL; Kenneth S. ;   et al. | 2020-12-10 |
Process for forming traces on a catalytic laminate Grant 10,849,233 - Bahl , et al. November 24, 2 | 2020-11-24 |
Catalytic laminate with conductive traces formed during lamination Grant 10,827,624 - Bahl , et al. November 3, 2 | 2020-11-03 |
Catalytic circuit board with traces and vias Grant 10,806,029 - Bahl , et al. October 13, 2 | 2020-10-13 |
Folded Multilayered Flexible Circuit Board and Methods of Manufacturing Thereof App 20200296840 - Karavakis; Konstantine ;   et al. | 2020-09-17 |
Circuit Board with Improved Thermal, Moisture Resistance, and Electrical Properties App 20200288569 - Jung; Robert ;   et al. | 2020-09-10 |
Circuit Board with Improved Thermal, Moisture Resistance, and Electrical Properties App 20200288570 - Jung; Robert ;   et al. | 2020-09-10 |
Process for printed circuit boards using backing foil Grant 10,765,012 - Bahl , et al. Sep | 2020-09-01 |
Method for making a multi-layer circuit board using conductive paste with interposer layer Grant 10,765,003 - Bahl , et al. Sep | 2020-09-01 |
Method and apparatus for forming contacts on an integrated circuit die using a catalytic adhesive Grant 10,685,931 - Bahl , et al. | 2020-06-16 |
Method for wafer level packaging Grant 10,573,610 - Bahl , et al. Feb | 2020-02-25 |
UV curable Catalytic Adhesive for Circuit Boards with Traces and Vias App 20200008306 - KARAVAKIS; Konstantine ;   et al. | 2020-01-02 |
Method for making a Multi-Layer Circuit Board using conductive Paste with Interposer layer App 20190320530 - BAHL; Kenneth S. ;   et al. | 2019-10-17 |
Catalytic Laminate with Conductive Traces formed during Lamination App 20190274221 - BAHL; Kenneth S ;   et al. | 2019-09-05 |
Catalytic Laminate Apparatus and Method App 20190239349 - BAHL; Kenneth S. ;   et al. | 2019-08-01 |
Multi-layer circuit board using interposer layer and conductive paste Grant 10,349,520 - Karavakis , et al. July 9, 2 | 2019-07-09 |
Circuit board with catalytic adhesive Grant 10,306,756 - Bahl , et al. | 2019-05-28 |
Plasma Etched Catalytic Laminate with Traces and Vias App 20190014666 - BAHL; Kenneth S. ;   et al. | 2019-01-10 |
Semi-additive process for printed circuit boards App 20190014667 - BAHL; Kenneth S. ;   et al. | 2019-01-10 |
Multi-Layer Circuit Board using Interposer layer and Conductive Paste App 20190008044 - KARAVAKIS; Konstantine ;   et al. | 2019-01-03 |
Circuit board with Catalytic Adhesive App 20180168036 - BAHL; Kenneth S. ;   et al. | 2018-06-14 |
Method and Apparatus for forming Contacts on an Integrated Circuit Die using a Catalytic Adhesive App 20180158793 - BAHL; Kenneth S. ;   et al. | 2018-06-07 |
Circuit board apparatus and method Grant 9,942,981 - Bahl , et al. April 10, 2 | 2018-04-10 |
Integrated circuit wafer integration with catalytic laminate or adhesive Grant 9,922,951 - Bahl , et al. March 20, 2 | 2018-03-20 |
Circuit Board Apparatus and Method App 20180054889 - BAHL; Kenneth S. ;   et al. | 2018-02-22 |
Via in a printed circuit board Grant 9,706,667 - Karavakis , et al. July 11, 2 | 2017-07-11 |
Catalytic laminate apparatus and method Grant 9,706,650 - Bahl , et al. July 11, 2 | 2017-07-11 |
Via in a printed circuit board Grant 9,674,967 - Karavakis , et al. June 6, 2 | 2017-06-06 |
Methods for forming embedded traces Grant 9,631,279 - Bahl , et al. April 25, 2 | 2017-04-25 |
Via In A Printed Circuit Board App 20160295708 - Karavakis; Konstantine ;   et al. | 2016-10-06 |
Printed Circuit Board App 20160278206 - Bahl; Kenneth S. ;   et al. | 2016-09-22 |
Via in a printed circuit board Grant 9,398,703 - Karavakis , et al. July 19, 2 | 2016-07-19 |
Method for forming traces of a printed circuit board Grant 9,380,700 - Karavakis , et al. June 28, 2 | 2016-06-28 |
Wafer Level Packaging Using A Catalytic Adhesive App 20160148893 - Bahl; Kenneth S. ;   et al. | 2016-05-26 |
Via In A Printed Circuit Board App 20160135297 - Karavakis; Konstantine ;   et al. | 2016-05-12 |
Via In A Printed Circuit Board App 20150334836 - Karavakis; Konstantine ;   et al. | 2015-11-19 |
Embedded Traces App 20150334825 - Bahl; Kenneth S. ;   et al. | 2015-11-19 |
Embedded Traces App 20150334826 - Karavakis; Konstantine ;   et al. | 2015-11-19 |
Methods Of Making Compliant Semiconductor Chip Packages App 20150194347 - Fjelstad; Joseph ;   et al. | 2015-07-09 |
Methods Of Making Compliant Semiconductor Chip Packages App 20140042634 - Fjelstad; Joseph ;   et al. | 2014-02-13 |
Methods of making compliant semiconductor chip packages Grant 8,558,386 - Fjelstad , et al. October 15, 2 | 2013-10-15 |
Microelectronic assemblies having compliant layers Grant 8,338,925 - Fjelstad , et al. December 25, 2 | 2012-12-25 |
Microelectronic Assemblies Having Compliant Layers App 20110095441 - Fjelstad; Joseph ;   et al. | 2011-04-28 |
Microelectronic assemblies having compliant layers Grant 7,872,344 - Fjelstad , et al. January 18, 2 | 2011-01-18 |
Methods of making compliant semiconductor chip packages App 20100035382 - Fjelstad; Joseph ;   et al. | 2010-02-11 |
Self-cleaning socket for microelectronic devices Grant 7,491,069 - Di Stefano , et al. February 17, 2 | 2009-02-17 |
Microelectronic assemblies having compliant layers Grant 7,408,260 - Fjelstad , et al. August 5, 2 | 2008-08-05 |
Microelectronic assemblies having compliant layers App 20060261476 - Fjelstad; Joseph ;   et al. | 2006-11-23 |
Microelectronic assemblies having compliant layers App 20060237836 - Fjelstad; Joseph ;   et al. | 2006-10-26 |
Method of making components with releasable leads Grant 7,114,250 - Haba , et al. October 3, 2 | 2006-10-03 |
Microelectronic assemblies having compliant layers Grant 7,112,879 - Fjelstad , et al. September 26, 2 | 2006-09-26 |
Connection component with peelable leads Grant 7,067,742 - DiStefano , et al. June 27, 2 | 2006-06-27 |
Method of making a compliant integrated circuit package Grant 6,897,090 - DiStefano , et al. May 24, 2 | 2005-05-24 |
Image forming apparatus with improved transfer efficiency Grant 6,847,107 - Fjelstad , et al. January 25, 2 | 2005-01-25 |
Microelectronic package having a compliant layer with bumped protrusions Grant 6,847,101 - Fjelstad , et al. January 25, 2 | 2005-01-25 |
Microelectronic assemblies having compliant layers App 20040227225 - Fjelstad, Joseph ;   et al. | 2004-11-18 |
Method of making components with releasable leads App 20040217003 - Haba, Belgacem ;   et al. | 2004-11-04 |
Method of making components with releasable leads Grant 6,763,579 - Haba , et al. July 20, 2 | 2004-07-20 |
Components with releasable leads Grant 6,664,484 - Haba , et al. December 16, 2 | 2003-12-16 |
Compliant integrated circuit package App 20030207499 - DiStefano, Thomas H. ;   et al. | 2003-11-06 |
Components with releasable leads App 20030150111 - Haba, Belgacem ;   et al. | 2003-08-14 |
Compliant integrated circuit package Grant 6,603,209 - DiStefano , et al. August 5, 2 | 2003-08-05 |
Enhancements in sheet processing and lead formation Grant 6,602,431 - Karavakis August 5, 2 | 2003-08-05 |
Enhancements in sheet processing and lead formation App 20030068479 - Karavakis, Konstantine | 2003-04-10 |
Microelectronic assemblies having compliant layers App 20020195685 - Fjelstad, Joseph ;   et al. | 2002-12-26 |
Compliant integrated circuit package App 20020182841 - DiStefano, Thomas H. ;   et al. | 2002-12-05 |
Compliant microelectronic assemblies Grant 6,465,878 - Fjelstad , et al. October 15, 2 | 2002-10-15 |
Components with releasable leads App 20020117329 - Haba, Belgacem ;   et al. | 2002-08-29 |
Methods of making compliant semiconductor chip packages App 20020115236 - FJELSTAD, JOSEPH ;   et al. | 2002-08-22 |
Microelectronic package having a compliant layer with bumped protrusions App 20020100961 - Fjelstad, Joseph ;   et al. | 2002-08-01 |
Connection component with peelable leads App 20020081781 - DiStefano, Thomas H. ;   et al. | 2002-06-27 |
Compliant microelectronic mounting device Grant 6,370,032 - DiStefano , et al. April 9, 2 | 2002-04-09 |
Semiconductor chip package with fan-in leads App 20010007375 - Fjelstad, Joseph ;   et al. | 2001-07-12 |
Microelectronic component mounting with deformable shell terminals Grant 6,204,455 - Gilleo , et al. March 20, 2 | 2001-03-20 |
Flexible connectors for microelectronic elements Grant 6,086,386 - Fjelstad , et al. July 11, 2 | 2000-07-11 |
Method of forming compliant microelectronic mounting device Grant 6,012,224 - DiStefano , et al. January 11, 2 | 2000-01-11 |
Microelectronic component mounting with deformable shell terminals Grant 5,971,253 - Gilleo , et al. October 26, 1 | 1999-10-26 |
Methods of making semiconductor assemblies with reinforced peripheral regions Grant 5,966,587 - Karavakis , et al. October 12, 1 | 1999-10-12 |
Compliant integrated circuit package and method of fabricating the same Grant 5,929,517 - Distefano , et al. July 27, 1 | 1999-07-27 |
Method of encapsulating a semiconductor package Grant 5,776,796 - Distefano , et al. July 7, 1 | 1998-07-07 |
Semiconductor assemblies with reinforced peripheral regions Grant 5,777,379 - Karavakis , et al. July 7, 1 | 1998-07-07 |
Compliant microelectrionic mounting device Grant 5,706,174 - Distefano , et al. January 6, 1 | 1998-01-06 |
Method of encapsulating die and chip carrier Grant 5,663,106 - Karavakis , et al. September 2, 1 | 1997-09-02 |
Manufacture of semiconductor connection components with frangible lead sections Grant 5,629,239 - DiStefano , et al. May 13, 1 | 1997-05-13 |
Method for making a flexible lead for a microelectronic device Grant 5,597,470 - Karavakis , et al. January 28, 1 | 1997-01-28 |
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