KAO; YU-HSIANG

Patent Applications and Registrations

Patent applications and USPTO patent grants for KAO; YU-HSIANG.The latest application filed is for "method for manufacturing electroless plating substrate and method for forming metal layer on surface of substrate".

Company Profile

2.7.8

KAO; YU-HSIANG - New Taipei City TW
Kao; Yu-Hsiang - New Taipei TW
Kao; Yu-Hsiang - Hsin-Chu TW
Kao; Yu-Hsiang - Hsinchu TW
Kao; Yu-Hsiang - Hsinchu City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method For Manufacturing Electroless Plating Substrate And Method For Forming Metal Layer On Surface Of Substrate App 20210046455 - WEI; TZU-CHIEN ; et al.	2021-02-18
Self-adsorbed catalyst composition, method for preparing the same and method for manufacturing electroless plating substrate Grant 10,828,624 - Wei , et al. November 10, 2	2020-11-10
Self-adsorbed Catalyst Composition, Method For Preparing The Same And Method For Manufacturing Electroless Plating Substrate App 20190118165 - WEI; Tzu-Chien ; et al.	2019-04-25
Layout optimization for integrated circuit design Grant 9,754,073 - Chen , et al. September 5, 2	2017-09-05
Interconnect structure having smaller transition layer via Grant 9,553,043 - Lu , et al. January 24, 2	2017-01-24
Layout Optimization for Integrated Circuit Design App 20160350473 - Chen; Huang-Yu ; et al.	2016-12-01
Layout optimization for integrated circuit design Grant 9,418,196 - Chen , et al. August 16, 2	2016-08-16
Layout optimization for integrated circuit design Grant 9,292,645 - Chen , et al. March 22, 2	2016-03-22
Layout Optimization For Integrated Circuit Design App 20150199469 - Chen; Huang-Yu ; et al.	2015-07-16
Layout Optimization For Integrated Circuit Design App 20150082259 - CHEN; HUANG-YU ; et al.	2015-03-19
Layout optimization for integrated design Grant 8,898,600 - Chen , et al. November 25, 2	2014-11-25
Layout Optimization for Integrated Design App 20140282306 - Chen; Huang-Yu ; et al.	2014-09-18
Interconnect Structure Having Smaller Transition Layer Via App 20130256902 - LU; Lee-Chung ; et al.	2013-10-03

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