loadpatents
Patent applications and USPTO patent grants for Kao; Hsiang-Lun.The latest application filed is for "metal line structure and method".
Patent | Date |
---|---|
Metal Line Structure and Method App 20210375760 - Kao; Hsiang-Lun ;   et al. | 2021-12-02 |
Metal line structure and method Grant 11,101,216 - Kao , et al. August 24, 2 | 2021-08-24 |
Metal Line Structure and Method App 20200051914 - Kao; Hsiang-Lun ;   et al. | 2020-02-13 |
Metal line structure and method Grant 10,490,500 - Kao , et al. Nov | 2019-11-26 |
Non-contact and optical measuring automation system for the profile accuracy of disk cams and method thereof Grant 10,415,962 - Chang , et al. Sept | 2019-09-17 |
Non-contact And Optical Measuring Automation System For The Profile Accuracy Of Disk Cams And Method Thereof App 20190063908 - CHANG; WEN-TUNG ;   et al. | 2019-02-28 |
Non-contact and optical measuring automation system for the surface roughness value of disk cams and method thereof Grant 10,151,585 - Chang , et al. Dec | 2018-12-11 |
Method of semiconductor integrated circuit fabrication Grant 10,109,519 - Kao , et al. October 23, 2 | 2018-10-23 |
Semiconductor device and process Grant 9,837,307 - Kao , et al. December 5, 2 | 2017-12-05 |
Metal Line Structure and Method App 20170162504 - Kao; Hsiang-Lun ;   et al. | 2017-06-08 |
Semiconductor Device and Process App 20170148671 - Kao; Hsiang-Lun ;   et al. | 2017-05-25 |
Metal line structure and method Grant 9,583,434 - Kao , et al. February 28, 2 | 2017-02-28 |
Semiconductor device and process Grant 9,564,396 - Kao , et al. February 7, 2 | 2017-02-07 |
Method Of Semiconductor Integrated Circuit Fabrication App 20170018498 - Kao; Hsiang-Lun ;   et al. | 2017-01-19 |
Method of semiconductor integrated circuit fabrication Grant 9,455,178 - Kao , et al. September 27, 2 | 2016-09-27 |
Semiconductor Device and Process App 20160093568 - Kao; Hsiang-Lun ;   et al. | 2016-03-31 |
Metal Line Structure and Method App 20160020168 - Kao; Hsiang-Lun ;   et al. | 2016-01-21 |
Method of Semiconductor Integrated Circuit Fabrication App 20150262860 - Kao; Hsiang-Lun ;   et al. | 2015-09-17 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.