loadpatents
name:-0.024141073226929
name:-0.082868099212646
name:-0.013570785522461
KANG; Po-Zeng Patent Filings

KANG; Po-Zeng

Patent Applications and Registrations

Patent applications and USPTO patent grants for KANG; Po-Zeng.The latest application filed is for "semiconductor device with source resistor and manufacturing method thereof".

Company Profile
11.18.22
  • KANG; Po-Zeng - Tainan City TW
  • KANG; Po-Zeng - Hsinchu TW
  • KANG; Po-Zeng - Hsin-Hua TW
  • Kang; Po-Zeng - Tainan TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor Device With Source Resistor And Manufacturing Method Thereof
App 20220122913 - KANG; Po-Zeng ;   et al.
2022-04-21
Device For Temperature Monitoring Of A Semiconductor Device
App 20220082451 - KANG; Po-Zeng ;   et al.
2022-03-17
Integrated Circuit Device, Method, Layout, And System
App 20220037312 - KANG; Po-Zeng ;   et al.
2022-02-03
Semiconductor device with source resistor and manufacturing method thereof
Grant 11,217,526 - Kang , et al. January 4, 2
2022-01-04
Device and method for temperature monitoring of a semiconductor device
Grant 11,215,513 - Kang , et al. January 4, 2
2022-01-04
Device And Method For Temperature Monitoring Of A Semiconductor Device
App 20210116308 - KANG; Po-Zeng ;   et al.
2021-04-22
Uni-gate cell design
Grant 10,872,189 - Chou , et al. December 22, 2
2020-12-22
Semiconductor Device With Source Resistor And Manufacturing Method Thereof
App 20200279809 - KANG; Po-Zeng ;   et al.
2020-09-03
IC degradation management circuit, system and method
Grant 10,514,417 - Kang , et al. Dec
2019-12-24
Output resistance testing integrated circuit
Grant 10,401,407 - Chou , et al. Sep
2019-09-03
Ic Degradation Management Circuit, System And Method
App 20190195943 - KANG; Po-Zeng ;   et al.
2019-06-27
Uni-gate Cell Design
App 20190179993 - CHOU; Wen-Shen ;   et al.
2019-06-13
Time to current converter
Grant 10,274,536 - Peng , et al.
2019-04-30
Output Resistance Testing Integrated Circuit
App 20190094277 - CHOU; Wen-Shen ;   et al.
2019-03-28
IC degradation management circuit, system and method
Grant 10,222,412 - Kang , et al.
2019-03-05
Output resistance testing method
Grant 10,161,976 - Chou , et al. Dec
2018-12-25
Output Resistance Testing Method
App 20180321291 - CHOU; Wen-Shen ;   et al.
2018-11-08
Output resistance testing structure
Grant 10,018,660 - Chou , et al. July 10, 2
2018-07-10
Time To Current Converter
App 20180031627 - Peng; Yung-Chow ;   et al.
2018-02-01
Ic Degradation Management Circuit, System And Method
App 20170350938 - KANG; Po-Zeng ;   et al.
2017-12-07
Nearly buffer zone free layout methodology
Grant 9,659,919 - Peng , et al. May 23, 2
2017-05-23
FinFET with embedded MOS varactor and method of making same
Grant 9,343,552 - Chen , et al. May 17, 2
2016-05-17
Semiconductor mismatch reduction
Grant 9,287,252 - Chen , et al. March 15, 2
2016-03-15
Output Resistance Testing Structure And Method Of Using The Same
App 20150362539 - CHOU; Wen-Shen ;   et al.
2015-12-17
FinFET with Embedded MOS Varactor and Method of Making Same
App 20150270368 - Chen; Wan-Te ;   et al.
2015-09-24
FinFET with embedded MOS varactor and method of making same
Grant 9,064,725 - Chen , et al. June 23, 2
2015-06-23
LOW gds MEASUREMENT METHODOLOGY FOR MOS
App 20150168468 - Peng; Yung-Chow ;   et al.
2015-06-18
Nearly Buffer Zone Free Layout Methodology
App 20150108610 - Peng; Yung-Chow ;   et al.
2015-04-23
Nearly buffer zone free layout methodology
Grant 8,916,955 - Peng , et al. December 23, 2
2014-12-23
Semiconductor device feature density gradient verification
Grant 8,856,707 - Peng , et al. October 7, 2
2014-10-07
FinFET with Embedded MOS Varactor and Method of Making Same
App 20140167172 - Chen; Wan-Te ;   et al.
2014-06-19
Nearly Buffer Zone Free Layout Methodology
App 20140103494 - Peng; Yung-Chow ;   et al.
2014-04-17
Semiconductor Device Feature Density Gradient Verification
App 20130346935 - PENG; Young-Chow ;   et al.
2013-12-26
Semiconductor device feature density gradient verification
Grant 8,549,453 - Peng , et al. October 1, 2
2013-10-01
Semiconductor Device Feature Density Gradient Verification
App 20130198710 - Peng; Young-Chow ;   et al.
2013-08-01
Semiconductor Mismatch Reduction
App 20120235208 - Chen; Chung-Hui ;   et al.
2012-09-20

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