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name:-0.019708156585693
name:-0.021571159362793
name:-0.024574041366577
Kanakasabapathy; Siva Patent Filings

Kanakasabapathy; Siva

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kanakasabapathy; Siva.The latest application filed is for "metal cut patterning and etching to minimize interlayer dielectric layer loss".

Company Profile
23.16.16
  • Kanakasabapathy; Siva - Pleasanton CA
  • Kanakasabapathy; Siva - Armonk NY
  • Kanakasabapathy; Siva - Hopewell Junction NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Metal Cut Patterning And Etching To Minimize Interlayer Dielectric Layer Loss
App 20220005698 - Chung; Kisup ;   et al.
2022-01-06
Metal cut patterning and etching to minimize interlayer dielectric layer loss
Grant 11,133,189 - Chung , et al. September 28, 2
2021-09-28
Multi-channel overlay metrology
Grant 11,054,250 - Muthinti , et al. July 6, 2
2021-07-06
FinFET gate cut after dummy gate removal
Grant 11,024,715 - Sporre , et al. June 1, 2
2021-06-01
Nanosheet single gate (SG) and extra gate (EG) field effect transistor (FET) co-integration
Grant 10,741,660 - Loubet , et al. A
2020-08-11
Metal cut patterning and etching to minimize interlayer dielectric layer loss
Grant 10,734,234 - Chung , et al.
2020-08-04
Finfet Gate Cut After Dummy Gate Removal
App 20200243648 - Sporre; John R. ;   et al.
2020-07-30
Gate cut in RMG
Grant 10,692,990 - Bao , et al.
2020-06-23
Gate cut in RMG
Grant 10,644,129 - Bao , et al.
2020-05-05
Gate cut using selective deposition to prevent oxide loss
Grant 10,622,482 - Greene , et al.
2020-04-14
FinFET gate cut after dummy gate removal
Grant 10,600,868 - Sporre , et al.
2020-03-24
Gate Cut In Rmg
App 20200044052 - Bao; Ruqiang ;   et al.
2020-02-06
Gate Cut In Rmg
App 20200044051 - Bao; Ruqiang ;   et al.
2020-02-06
Gate cut in RMG
Grant 10,553,700 - Bao , et al. Fe
2020-02-04
Nanosheet Single Gate (sg) And Extra Gate (eg) Field Effect Transistor (fet) Co-integration
App 20190378906 - Loubet; Nicolas J. ;   et al.
2019-12-12
Gate cut in replacement metal gate process
Grant 10,504,798 - Xie , et al. Dec
2019-12-10
Gate Cut In Rmg
App 20190371912 - Bao; Ruqiang ;   et al.
2019-12-05
Multi-channel Overlay Metrology
App 20190316900 - Muthinti; Gangadhara Raja ;   et al.
2019-10-17
Gate Cut Using Selective Deposition To Prevent Oxide Loss
App 20190259665 - Greene; Andrew M. ;   et al.
2019-08-22
Gate Cut In Replacement Metal Gate Process
App 20190252268 - Xie; Ruilong ;   et al.
2019-08-15
Gate cut using selective deposition to prevent oxide loss
Grant 10,347,540 - Greene , et al. July 9, 2
2019-07-09
Stoplayer
App 20190206864 - He; Hong ;   et al.
2019-07-04
Metal Cut Patterning And Etching To Minimize Interlayer Dielectric Layer Loss
App 20190198327 - Chung; Kisup ;   et al.
2019-06-27
Finfet Gate Cut After Dummy Gate Removal
App 20190189517 - Sporre; John R. ;   et al.
2019-06-20
Metal Cut Patterning And Etching To Minimize Interlayer Dielectric Layer Loss
App 20190189452 - Chung; Kisup ;   et al.
2019-06-20
Gate Cut Using Selective Deposition To Prevent Oxide Loss
App 20190189782 - Greene; Andrew M. ;   et al.
2019-06-20
FinFET gate cut after dummy gate removal
Grant 10,229,854 - Sporre , et al.
2019-03-12
Phase shifted gas delivery for high throughput and cost effectiveness associated with atomic layer etching and atomic layer deposition
Grant 10,167,558 - Lie , et al. J
2019-01-01
Stop Layer Through Ion Implantation For Etch Stop
App 20170148790 - HE; Hong ;   et al.
2017-05-25
Stop layer through ion implantation for etch stop
Grant 9,627,263 - He , et al. April 18, 2
2017-04-18
Advanced high-k gate stack patterning and structure containing a patterned high-k gate stack
Grant 7,820,552 - Kanakasabapathy , et al. October 26, 2
2010-10-26
ADVANCED HIGH-k GATE STACK PATTERNING AND STRUCTURE CONTAINING A PATTERNED HIGH-k GATE STACK
App 20080224238 - Kanakasabapathy; Siva ;   et al.
2008-09-18

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