loadpatents
name:-0.0092380046844482
name:-0.0083558559417725
name:-0.00062203407287598
Kanagawa; Naoaki Patent Filings

Kanagawa; Naoaki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kanagawa; Naoaki.The latest application filed is for "memory system".

Company Profile
1.10.9
  • Kanagawa; Naoaki - Yokohama JP
  • Kanagawa; Naoaki - Kanagawa JP
  • KANAGAWA; Naoaki - Yokohama Kanagawa JP
  • KANAGAWA; Naoaki - YOKOHAMA-SHI JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory system
Grant 11,281,406 - Kanagawa March 22, 2
2022-03-22
Semiconductor memory device
Grant 11,164,639 - Noro , et al. November 2, 2
2021-11-02
Memory System
App 20210303210 - KANAGAWA; Naoaki
2021-09-30
Semiconductor Memory Device
App 20200202954 - NORO; Hiromi ;   et al.
2020-06-25
Semiconductor device
Grant 10,601,424 - Kanagawa
2020-03-24
Semiconductor Device
App 20200091913 - KANAGAWA; Naoaki
2020-03-19
Frequency Divider Circuit
App 20180278255 - KANAGAWA; Naoaki
2018-09-27
Frequency divider circuit
Grant 10,084,458 - Kanagawa September 25, 2
2018-09-25
Semiconductor device
Grant 9,105,356 - Kanagawa August 11, 2
2015-08-11
Semiconductor memory device capable of setting an internal state of a NAND flash memory in response to a set feature command
Grant 9,070,426 - Kanagawa June 30, 2
2015-06-30
Semiconductor Memory Device
App 20150071001 - KANAGAWA; Naoaki
2015-03-12
Semiconductor Device
App 20140177351 - KANAGAWA; Naoaki
2014-06-26
Semiconductor storage device
Grant 8,074,144 - Kanagawa , et al. December 6, 2
2011-12-06
Semiconductor device
Grant 7,697,353 - Kawaguchi , et al. April 13, 2
2010-04-13
Semiconductor Device
App 20080101130 - KAWAGUCHI; Kazuaki ;   et al.
2008-05-01
Semiconductor Storage Device
App 20080056025 - Kanagawa; Naoaki ;   et al.
2008-03-06
Semiconductor memory device of bit line twist system
Grant 7,035,153 - Hayashi , et al. April 25, 2
2006-04-25
Semiconductor memory device of bit line twist system
App 20050141297 - Hayashi, Shintaro ;   et al.
2005-06-30
Redundancy circuit technique applied DRAM of multi-bit I/O having overlaid-DQ bus
Grant 5,892,719 - Kanagawa April 6, 1
1999-04-06

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed