loadpatents
Patent applications and USPTO patent grants for Kamp; Winfried.The latest application filed is for "latch based memory device".
Patent | Date |
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Identification circuit and method for generating an identification bit Grant 8,854,866 - Huber , et al. October 7, 2 | 2014-10-07 |
Latch based memory device Grant 8,780,648 - Koeppe , et al. July 15, 2 | 2014-07-15 |
Latch Based Memory Device App 20130141987 - Koeppe; Siegmar ;   et al. | 2013-06-06 |
Latch based memory device Grant 8,331,163 - Koeppe , et al. December 11, 2 | 2012-12-11 |
Latch Based Memory Device App 20120057411 - Koeppe; Siegmar ;   et al. | 2012-03-08 |
Identification Circuit and Method for Generating an Identification Bit App 20120020145 - Huber; Peter ;   et al. | 2012-01-26 |
Integrated circuit and method for determining an integrated circuit layout Grant 7,979,828 - Kuesel , et al. July 12, 2 | 2011-07-12 |
Method of fabricating an integrated circuit with stress enhancement Grant 7,932,542 - Berthold , et al. April 26, 2 | 2011-04-26 |
Circuit and method for calculating a logic combination of two encrypted input operands Grant 7,881,465 - Degrendel , et al. February 1, 2 | 2011-02-01 |
Logic circuit and method for calculating an encrypted result operand Grant 7,876,893 - Degrendel , et al. January 25, 2 | 2011-01-25 |
Logic Circuit And Method For Calculating An Encrypted Result Operand App 20100329446 - Degrendel; Antoine ;   et al. | 2010-12-30 |
Architecture of Function Blocks and Wirings in a Structured ASIC and Configurable Driver Cell of a Logic Cell Zone App 20100308863 - Gliese; Jorg ;   et al. | 2010-12-09 |
Semiconductor device and method for manufacturing the same Grant 7,816,198 - Ostermayr , et al. October 19, 2 | 2010-10-19 |
Architecture of function blocks and wirings in a structured ASIC and configurable driver cell of a logic cell zone Grant 7,755,110 - Gliese , et al. July 13, 2 | 2010-07-13 |
Carry-ripple adder Grant 7,716,270 - Hatsch , et al. May 11, 2 | 2010-05-11 |
Method Of Fabricating An Integrated Circuit With Stress Enhancement App 20090079023 - Berthold; Joerg ;   et al. | 2009-03-26 |
Parity checking circuit for continuous checking of the parity of a memory cell Grant 7,509,561 - Kamp , et al. March 24, 2 | 2009-03-24 |
Circuit arrangement for supplying configuration data in FPGA devices Grant 7,492,187 - Kamp , et al. February 17, 2 | 2009-02-17 |
Multibit bit adder Grant 7,487,198 - Hatsch , et al. February 3, 2 | 2009-02-03 |
Semiconductor Device and Method for Manufacturing the Same App 20090014806 - Ostermayr; Martin ;   et al. | 2009-01-15 |
Mask-programmable logic macro and method for programming a logic macro Grant 7,439,765 - Kamp , et al. October 21, 2 | 2008-10-21 |
Nonvolatile memory cell Grant 7,436,694 - Berthold , et al. October 14, 2 | 2008-10-14 |
Layout of an Integrated Circuit App 20080185688 - Kuesel; Andreas ;   et al. | 2008-08-07 |
Circuit and method for calculating a logical combination of two input operands Grant 7,342,423 - Degrendel , et al. March 11, 2 | 2008-03-11 |
Nonvolatile memory cell App 20070047292 - Berthold; Joerg ;   et al. | 2007-03-01 |
Circuit And Method For Calculating A Logical Combination Of Two Input Operands App 20070035332 - Degrendel; Antoine ;   et al. | 2007-02-15 |
Circuit And Method For Calculating A Logic Combination Of Two Encrypted Input Operands App 20070030031 - Degrendel; Antoine ;   et al. | 2007-02-08 |
CAM (content addressable memory) apparatus Grant 7,158,396 - Hatsch , et al. January 2, 2 | 2007-01-02 |
Carry-ripple adder App 20060294178 - Bernhardt; Marc ;   et al. | 2006-12-28 |
Mask-programmable logic macro and method for programming a logic macro App 20060279329 - Kamp; Winfried ;   et al. | 2006-12-14 |
Circuit arrangement for supplying configuration data in FPGA devices App 20060273823 - Kamp; Winfried ;   et al. | 2006-12-07 |
Carry-ripple adder App 20060235923 - Hatsch; Joel ;   et al. | 2006-10-19 |
Content addressable memory cell Grant 6,977,831 - Hatsch , et al. December 20, 2 | 2005-12-20 |
Carry ripple adder Grant 6,978,290 - Hatsch , et al. December 20, 2 | 2005-12-20 |
Architecture of function blocks and wirings in a structured ASIC and configurable driver cell of a logic cell zone App 20050212562 - Gliese, Jorg ;   et al. | 2005-09-29 |
Parity checking circuit for continuous checking of the party of a memory cell App 20050204274 - Kamp, Winfried ;   et al. | 2005-09-15 |
Multibit bit adder App 20050114424 - Hatsch, Joel ;   et al. | 2005-05-26 |
Content addressable memory cell App 20050094477 - Hatsch, Joel ;   et al. | 2005-05-05 |
6-To-3 bit carry-save adder App 20040159712 - Hatsch, Joel ;   et al. | 2004-08-19 |
CAM (content addressable memory) apparatus App 20040162937 - Hatsch, Noel ;   et al. | 2004-08-19 |
Method for optimizing a cell layout using parameterizable cells and cell configuration data Grant 6,735,742 - Hatsch , et al. May 11, 2 | 2004-05-11 |
Carry-ripple adder App 20030033343 - Hatsch, Joel ;   et al. | 2003-02-13 |
Carry ripple adder App 20020147756 - Hatsch, Joel ;   et al. | 2002-10-10 |
Method of optimizing integrated circuits, apparatus for designing semiconductors, and program object for designing integrated circuits App 20020006695 - Hatsch, Joel ;   et al. | 2002-01-17 |
Adder cell for carry-save arithmetic Grant 4,893,269 - Knauer , et al. January 9, 1 | 1990-01-09 |
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