| Patent | Date |
|---|
Method of forming self-isolated and self-aligned 4F-square vertical FET-trench DRAM cells
Grant 6,316,309 - Holmes , et al. November 13, 2 | 2001-11-13 |
Self-isolated and self-aligned 4F-square vertical fet-trench dram cells
Grant 6,137,128 - Holmes , et al. October 24, 2 | 2000-10-24 |
Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array
Grant 6,077,745 - Burns, Jr. , et al. June 20, 2 | 2000-06-20 |
Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array
Grant 6,034,389 - Burns, Jr. , et al. March 7, 2 | 2000-03-07 |
Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array
Grant 6,013,548 - Burns, Jr. , et al. January 11, 2 | 2000-01-11 |
Processor based BIST for an embedded memory
Grant 5,961,653 - Kalter , et al. October 5, 1 | 1999-10-05 |
Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array
Grant 5,929,477 - McAllister Burns, Jr. , et al. July 27, 1 | 1999-07-27 |
Methods for precise definition of integrated circuit chip edges
Grant 5,925,924 - Cronin , et al. July 20, 1 | 1999-07-20 |
Multi-port multiple-simultaneous-access DRAM chip
Grant 5,875,470 - Dreibelbis , et al. February 23, 1 | 1999-02-23 |
Very dense integrated circuit package and method for forming the same
Grant 5,866,443 - Pogge , et al. February 2, 1 | 1999-02-02 |
Integrated circuit chip with a wide I/O memory array and redundant data lines
Grant 5,796,662 - Kalter , et al. August 18, 1 | 1998-08-18 |
Very dense integrated circuit package
Grant 5,770,884 - Pogge , et al. June 23, 1 | 1998-06-23 |
Integrated mulitchip memory module, structure and fabrication
Grant 5,702,984 - Bertin , et al. December 30, 1 | 1997-12-30 |
Methods for precise definition of integrated circuit chip edges
Grant 5,691,248 - Cronin , et al. November 25, 1 | 1997-11-25 |
Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature
Grant 5,682,394 - Blake , et al. October 28, 1 | 1997-10-28 |
Boundary independent bit decode for a SDRAM
Grant 5,663,924 - Barth, Jr. , et al. September 2, 1 | 1997-09-02 |
Process for forming a polysilicon electrode in a trench
Grant 5,656,544 - Bergendahl , et al. August 12, 1 | 1997-08-12 |
Endcap chip with conductive, monolithic L-connect for multichip stack
Grant 5,648,684 - Bertin , et al. July 15, 1 | 1997-07-15 |
Self-aligned integrated circuits
Grant 4,021,789 - Furman , et al. May 3, 1 | 1977-05-03 |
Parameter independent FET sense amplifier
Grant 3,993,917 - Kalter November 23, 1 | 1976-11-23 |
Time Ordered Memory System And Operation
Grant 3,811,117 - Anderson, Jr. , et al. May 14, 1 | 1974-05-14 |
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