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Kaltalioglu; Erdem Patent Filings

Kaltalioglu; Erdem

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kaltalioglu; Erdem.The latest application filed is for "ic structure with interdigitated conductive elements between metal guard structures".

Company Profile
10.80.80
  • Kaltalioglu; Erdem - Newburgh NY
  • Kaltalioglu; Erdem - Iselin NJ
  • Kaltalioglu; Erdem - Hsin-Chu TW
  • Kaltalioglu; Erdem - Wappingers Falls NY
  • Kaltalioglu; Erdem - Hsinchu TW
  • Kaltalioglu; Erdem - Fishkill NY
  • Kaltalioglu; Erdem - Hopewell Junction NY
  • Kaltalioglu; Erdem - Wappinger Falls NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
IC structure with interdigitated conductive elements between metal guard structures
Grant 10,770,407 - Wu , et al. Sep
2020-09-08
Ic Structure With Interdigitated Conductive Elements Between Metal Guard Structures
App 20200219826 - Wu; Zhuojie ;   et al.
2020-07-09
Interconnect structure having power rail structure and related method
Grant 10,438,890 - Kaltalioglu , et al. O
2019-10-08
Mechanically anchored C4 pad and method of forming same
Grant 10,388,617 - Kaltalioglu , et al. A
2019-08-20
Wafer rigidity with reinforcement structure
Grant 10,325,862 - Filippi , et al.
2019-06-18
Wafer reinforcement to reduce wafer curvature
Grant 10,304,783 - Kaltalioglu , et al.
2019-05-28
Interconnect structures for a security application
Grant 10,297,546 - Kaltalioglu , et al.
2019-05-21
Mechanically Anchored C4 Pad And Method Of Forming Same
App 20190123005 - Kaltalioglu; Erdem ;   et al.
2019-04-25
Interconnect Structures For A Security Application
App 20190027433 - Kaltalioglu; Erdem ;   et al.
2019-01-24
Interconnect Structure Having Power Rail Structure And Related Method
App 20180261538 - Kaltalioglu; Erdem ;   et al.
2018-09-13
Interconnect structure having power rail structure and related method
Grant 9,997,456 - Kaltalioglu , et al. June 12, 2
2018-06-12
IC structure integrity sensor having interdigitated conductive elements
Grant 9,947,602 - Wu , et al. April 17, 2
2018-04-17
Ic Structure Integrity Sensor Having Interdigitated Conductive Elements
App 20180047648 - Wu; Zhuojie ;   et al.
2018-02-15
Interconnect Structure Having Power Rail Structure And Related Method
App 20180033718 - Kaltalioglu; Erdem ;   et al.
2018-02-01
Wafer Rigidity With Reinforcement Structure
App 20180019214 - FILIPPI; Ronald G. ;   et al.
2018-01-18
Wafer Reinforcement To Reduce Wafer Curvature
App 20180005961 - Kaltalioglu; Erdem ;   et al.
2018-01-04
Wafer reinforcement to reduce wafer curvature
Grant 9,852,999 - Kaltalioglu , et al. December 26, 2
2017-12-26
Interconnect structures with variable dopant levels
Grant 9,768,065 - Wang , et al. September 19, 2
2017-09-19
Wafer rigidity with reinforcement structure
Grant 9,761,539 - Filippi , et al. September 12, 2
2017-09-12
TSV deep trench capacitor and anti-fuse structure
Grant 9,741,657 - Filippi , et al. August 22, 2
2017-08-22
Wafer Reinforcement To Reduce Wafer Curvature
App 20170098616 - Kaltalioglu; Erdem ;   et al.
2017-04-06
Strain detection structures for bonded wafers and chips
Grant 9,553,054 - Farooq , et al. January 24, 2
2017-01-24
Selective local metal cap layer formation for improved electromigration behavior
Grant 9,536,779 - Filippi , et al. January 3, 2
2017-01-03
Wafer Rigidity With Reinforcement Structure
App 20160379934 - FILIPPI; Ronald G. ;   et al.
2016-12-29
Structures and methods for determining TDDB reliability at reduced spacings using the structures
Grant 9,524,916 - Filippi , et al. December 20, 2
2016-12-20
Mechanically anchored backside C4 pad
Grant 9,478,509 - Filippi , et al. October 25, 2
2016-10-25
Selective local metal cap layer formation for improved electromigration behavior
Grant 9,431,293 - Filippi , et al. August 30, 2
2016-08-30
Passivated copper chip pads
Grant 9,373,596 - Goebel , et al. June 21, 2
2016-06-21
Through level vias and methods of formation thereof
Grant 9,330,974 - Kim , et al. May 3, 2
2016-05-03
Strain Detection Structures For Bonded Wafers And Chips
App 20160118348 - FAROOQ; Mukta G. ;   et al.
2016-04-28
E-fuse with hybrid metallization
Grant 9,305,879 - Filippi , et al. April 5, 2
2016-04-05
Selective Local Metal Cap Layer Formation For Improved Electromigration Behavior
App 20150255328 - Filippi; Ronald G. ;   et al.
2015-09-10
Facilitating Chip Dicing For Metal-metal Bonding And Hybrid Wafer Bonding
App 20150255417 - Farooq; Mukta G. ;   et al.
2015-09-10
Mechanically Anchored Backside C4 Pad
App 20150255410 - Filippi; Ronald G. ;   et al.
2015-09-10
Selective Local Metal Cap Layer Formation For Improved Electromigration Behavior
App 20150255387 - Filippi; Ronald G. ;   et al.
2015-09-10
Selective local metal cap layer formation for improved electromigration behavior
Grant 9,123,726 - Filippi , et al. September 1, 2
2015-09-01
Tsv Deep Trench Capacitor And Anti-fuse Structure
App 20150235944 - Filippi; Ronald G. ;   et al.
2015-08-20
Semiconductor article having a zig-zag guard ring and method of forming the same
Grant 9,082,781 - Filippi , et al. July 14, 2
2015-07-14
Electronic fuse line with modified cap
Grant 9,059,173 - Filippi , et al. June 16, 2
2015-06-16
Interconnect with hybrid metallization
Grant 9,059,166 - Filippi , et al. June 16, 2
2015-06-16
Facilitating chip dicing for metal-metal bonding and hybrid wafer bonding
Grant 9,059,333 - Farooq , et al. June 16, 2
2015-06-16
Electronic fuse having a damaged region
Grant 9,059,170 - Bao , et al. June 16, 2
2015-06-16
Random local metal cap layer formation for improved integrated circuit reliability
Grant 9,054,108 - Filippi , et al. June 9, 2
2015-06-09
Facilitating Chip Dicing For Metal-metal Bonding And Hybrid Wafer Bonding
App 20150155263 - Farooq; Mukta G. ;   et al.
2015-06-04
Semiconductor Article Having A Zig-zag Guard Ring
App 20150097297 - Filippi; Ronald G. ;   et al.
2015-04-09
Devices Formed With Dual Damascene Process
App 20150084196 - Riess; Philipp ;   et al.
2015-03-26
3d Chip Crackstop
App 20150069609 - Farooq; Mukta G. ;   et al.
2015-03-12
Crack Sensors for Semiconductor Devices
App 20150035556 - Kaltalioglu; Erdem
2015-02-05
Random Local Metal Cap Layer Formation For Improved Integrated Circuit Reliability
App 20150028484 - Filippi; Ronald G. ;   et al.
2015-01-29
Electronic Fuse Line With Modified Cap
App 20150021736 - Filippi; Ronald G. ;   et al.
2015-01-22
Random local metal cap layer formation for improved integrated circuit reliability
Grant 8,906,799 - Filippi , et al. December 9, 2
2014-12-09
Crack sensors for semiconductor devices
Grant 8,890,560 - Kaltalioglu November 18, 2
2014-11-18
Method of forming electronic fuse line with modified cap
Grant 8,889,491 - Filippi , et al. November 18, 2
2014-11-18
Interconnect With Hybrid Metallization
App 20140332963 - Filippi; Ronald G. ;   et al.
2014-11-13
E-fuse With Hybrid Metallization
App 20140332923 - Filippi; Ronald G. ;   et al.
2014-11-13
Devices formed with dual damascene process
Grant 8,860,225 - Riess , et al. October 14, 2
2014-10-14
Passivated Copper Chip Pads
App 20140295661 - Goebel; Thomas ;   et al.
2014-10-02
Passivated copper chip pads
Grant 8,822,324 - Goebel , et al. September 2, 2
2014-09-02
Electronic Fuse Having A Damaged Region
App 20140217612 - Bao; Junjing ;   et al.
2014-08-07
Electronic Fuse Line With Modified Cap
App 20140210040 - FILIPPI; RONALD G. ;   et al.
2014-07-31
Selective Local Metal Cap Layer Formation For Improved Electromigration Behavior
App 20140203436 - Filippi; Ronald G. ;   et al.
2014-07-24
Pads with different width in a scribe line region and method for manufacturing these pads
Grant 8,748,295 - Kaltalioglu , et al. June 10, 2
2014-06-10
Structures And Methods For Determining Tddb Reliability At Reduced Spacings Using The Structures
App 20140118020 - Filippi; Ronald G. ;   et al.
2014-05-01
Crack stop trenches
Grant 8,610,238 - Kaltalioglu , et al. December 17, 2
2013-12-17
Capacitor having a plurality of parallel conductive members
Grant 8,569,820 - Barth , et al. October 29, 2
2013-10-29
Passivated Copper Chip Pads
App 20130224946 - Goebel; Thomas ;   et al.
2013-08-29
Methods of manufacturing semiconductor devices and structures thereof
Grant 8,378,439 - Beck , et al. February 19, 2
2013-02-19
Crack stops for semiconductor devices
Grant 8,309,435 - Kaltalioglu , et al. November 13, 2
2012-11-13
Through Level Vias and Methods of Formation Thereof
App 20120104622 - Kim; Sunoo ;   et al.
2012-05-03
Semiconductor Devices and Methods of Manufacture Thereof
App 20120099243 - Barth; Hans-Joachim ;   et al.
2012-04-26
Crack sensors for semiconductor devices
Grant 8,159,254 - Kaltalioglu April 17, 2
2012-04-17
Methods of Manufacturing Semiconductor Devices and Structures Thereof
App 20120074536 - Beck; Michael ;   et al.
2012-03-29
Semiconductor devices and methods of manufacture thereof
Grant 8,138,539 - Barth , et al. March 20, 2
2012-03-20
Crack Sensors for Semiconductor Devices
App 20120049884 - Kaltalioglu; Erdem
2012-03-01
Devices Formed With Dual Damascene Process
App 20120025382 - Riess; Philipp ;   et al.
2012-02-02
Methods of manufacturing semiconductor devices and structures thereof
Grant 8,093,150 - Beck , et al. January 10, 2
2012-01-10
Dual damascene process
Grant 8,062,971 - Riess , et al. November 22, 2
2011-11-22
Crack Stops for Semiconductor Devices
App 20110244658 - Kaltalioglu; Erdem ;   et al.
2011-10-06
Crack stops for semiconductor devices
Grant 8,008,750 - Kaltalioglu , et al. August 30, 2
2011-08-30
Crack Stop Trenches
App 20110074033 - Kaltalioglu; Erdem ;   et al.
2011-03-31
Crack stop trenches
Grant 7,871,902 - Kaltalioglu , et al. January 18, 2
2011-01-18
Method of forming support structures for semiconductor devices
Grant 7,858,448 - Goebel , et al. December 28, 2
2010-12-28
Test Structures and Methods for Semiconductor Devices
App 20100314619 - Kaltalioglu; Erdem ;   et al.
2010-12-16
MIM capacitors with catalytic activation layer
Grant 7,843,035 - Barth , et al. November 30, 2
2010-11-30
Capacitor integrated in a structure surrounding a die
Grant 7,795,615 - Goebel , et al. September 14, 2
2010-09-14
Method and apparatus of stress relief in semiconductor structures
Grant 7,786,007 - Hoinkis , et al. August 31, 2
2010-08-31
Method of Forming Support Structures for Semiconductor Devices
App 20100022085 - Goebel; Thomas ;   et al.
2010-01-28
Support structures for semiconductor devices
Grant 7,626,268 - Goebel , et al. December 1, 2
2009-12-01
Capacitor and method of manufacturing a capacitor
Grant 7,615,440 - Felsner , et al. November 10, 2
2009-11-10
Dual Damascene Process
App 20090239375 - Riess; Philipp ;   et al.
2009-09-24
Crack Stop Trenches
App 20090203192 - Kaltalioglu; Erdem ;   et al.
2009-08-13
Passivated Copper Chip Pads
App 20090200675 - Goebel; Thomas ;   et al.
2009-08-13
Crack Sensors for Semiconductor Devices
App 20090201043 - Kaltalioglu; Erdem
2009-08-13
Crack Stops for Semiconductor Devices
App 20090194850 - Kaltalioglu; Erdem ;   et al.
2009-08-06
Methods of forming an interconnect structure
Grant 7,553,703 - Herold , et al. June 30, 2
2009-06-30
Semiconductor Devices and Methods of Manufacture Thereof
App 20090141424 - Barth; Hans-Joachim ;   et al.
2009-06-04
Back end interconnect with a shaped interface
Grant 7,494,915 - Clevenger , et al. February 24, 2
2009-02-24
MIM Capacitors
App 20080290459 - Barth; Hans-Joachim ;   et al.
2008-11-27
MIM capacitor with a cap layer over the conductive plates
Grant 7,436,016 - Barth , et al. October 14, 2
2008-10-14
Method and Apparatus of Stress Relief in Semiconductor Structures
App 20080213993 - Hoinkis; Mark ;   et al.
2008-09-04
Memory Card with Connecting Portions for Connection to an Adapter
App 20080119039 - Herold; Klaus ;   et al.
2008-05-22
Method and apparatus of stress relief in semiconductor structures
Grant 7,368,804 - Hoinkis , et al. May 6, 2
2008-05-06
Methods of manufacturing semiconductor devices and structures thereof
App 20080070404 - Beck; Michael ;   et al.
2008-03-20
Memory card with connecting portions for connection to an adapter
Grant 7,332,812 - Herold , et al. February 19, 2
2008-02-19
Capacitor and Method of Manufacturing a Capacitor
App 20070294871 - Felsner; Petra ;   et al.
2007-12-27
Final passivation scheme for integrated circuits
Grant 7,307,346 - Kaltalioglu , et al. December 11, 2
2007-12-11
Capacitor and method of manufacturing a capacitor
Grant 7,268,383 - Felsner , et al. September 11, 2
2007-09-11
Bilayered metal hardmasks for use in dual damascene etch schemes
Grant 7,241,681 - Kumar , et al. July 10, 2
2007-07-10
Capacitor integrated in a structure surrounding a die
App 20070102787 - Goebel; Thomas ;   et al.
2007-05-10
Support structures for semiconductor devices
App 20070080464 - Goebel; Thomas ;   et al.
2007-04-12
Polishing methods and apparatus
Grant 7,201,634 - Naujok , et al. April 10, 2
2007-04-10
Back End Interconnect With A Shaped Interface
App 20060292852 - Clevenger; Lawrence A. ;   et al.
2006-12-28
Dual damascene structure and method
Grant 7,125,792 - Kumar , et al. October 24, 2
2006-10-24
Conductive line end extension
App 20060231955 - Herold; Klaus ;   et al.
2006-10-19
Back end interconnect with a shaped interface
Grant 7,122,462 - Clevenger , et al. October 17, 2
2006-10-17
Dual damascene structure and method
Grant 7,091,612 - Kumar , et al. August 15, 2
2006-08-15
Reduction of the shear stress in copper via's in organic interlayer dielectric material
Grant 7,060,619 - Cowley , et al. June 13, 2
2006-06-13
Bilayered metal hardmasks for use in dual damascene etch schemes
App 20060113278 - Kumar; Kaushik ;   et al.
2006-06-01
Bilayered metal hardmasks for use in Dual Damascene etch schemes
Grant 7,052,621 - Kumar , et al. May 30, 2
2006-05-30
MIM capacitors
App 20050282346 - Barth, Hans-Joachim ;   et al.
2005-12-22
Final passivation scheme for integrated circuits
App 20050260842 - Kaltalioglu, Erdem ;   et al.
2005-11-24
Stress-relief layer for semiconductor applications
Grant 6,960,835 - Barth , et al. November 1, 2
2005-11-01
Method and apparatus of stress relief in semiconductor structures
App 20050221610 - Hoinkis, Mark ;   et al.
2005-10-06
Methods of forming MIM capacitors
Grant 6,949,442 - Barth , et al. September 27, 2
2005-09-27
Bilayer HDP CVD/PE CVD cap in advanced BEOL interconnect structures and method thereof
Grant 6,914,320 - Chen , et al. July 5, 2
2005-07-05
Back End Interconnect With a Shaped Interface
App 20050112864 - Clevenger, Lawrence A. ;   et al.
2005-05-26
Stress-relief layer for semiconductor applications
App 20050093159 - Barth, Hans-Joachim ;   et al.
2005-05-05
Bilayer HDP CVD/PE CVD cap in advance BEOL interconnect structures and method thereof
Grant 6,887,783 - Chen , et al. May 3, 2
2005-05-03
Dual damascene structure and method
App 20050079706 - Kumar, Kaushik ;   et al.
2005-04-14
Dual damascene structure and method
App 20050077628 - Kumar, Kaushik ;   et al.
2005-04-14
Bilayered metal hardmasks for use in dual damascene etch schemes
App 20040251234 - Kumar, Kaushik ;   et al.
2004-12-16
Method and apparatus of stress relief in semiconductor structures
App 20040227214 - Hoinkis, Mark ;   et al.
2004-11-18
Single mask MIM capacitor top plate
App 20040224474 - Barth, Hans-Joachim ;   et al.
2004-11-11
Method for eliminating via resistance shift in organic ILD
Grant 6,806,182 - Restaino , et al. October 19, 2
2004-10-19
Robust via structure and method
Grant 6,806,579 - Cowley , et al. October 19, 2
2004-10-19
Reduction of the shear stress in copper via's in organic interlayer dielectric material
App 20040175921 - Cowley, Andy ;   et al.
2004-09-09
Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof
App 20040173907 - Chen, Tze-Chiang ;   et al.
2004-09-09
Capacitor and method of manufacturing a capacitor
App 20040164339 - Felsner, Petra ;   et al.
2004-08-26
Robust Via Structure And Method
App 20040157442 - Cowley, Andy ;   et al.
2004-08-12
FBEOL process for Cu metallizations free from Al-wirebond pads
Grant 6,730,982 - Barth , et al. May 4, 2
2004-05-04
Via liner integration to avoid resistance shift and resist mechanical stress
App 20040058526 - Cowley, Andrew ;   et al.
2004-03-25
Method for eliminating VIA resistance shift in organic ILD
App 20030207559 - Restaino, Darryl ;   et al.
2003-11-06
Dual hardmask single damascene integration scheme in an organic low k ILD
Grant 6,638,851 - Cowley , et al. October 28, 2
2003-10-28
Barbed vias for electrical and mechanical connection between conductive layers in semiconductor devices
Grant 6,613,664 - Barth , et al. September 2, 2
2003-09-02
Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof
App 20030134499 - Chen, Tze-Chiang ;   et al.
2003-07-17
Elimination of via-resistance-shift by increasing via size at a last level
App 20030042580 - Hoinkis, Mark ;   et al.
2003-03-06
Dual damascene integration scheme using a bilayer interlevel dielectric
App 20020173079 - Kaltalioglu, Erdem
2002-11-21
Dual hardmask single damascene integration scheme in an organic low k ILD
App 20020164870 - Cowley, Andy ;   et al.
2002-11-07
FBEOL process for Cu metallizations free from Al-wirebond pads
App 20020142592 - Barth, Hans-Joachim ;   et al.
2002-10-03
Barbed vias for electrical and mechanical connection between conductive layers in semiconductor devices
App 20020086517 - Barth, Hans-Joachin ;   et al.
2002-07-04
Barbed vias for electrical and mechanical connection between conductive layers in semiconductor devices
App 20020086523 - Barth, Hans-Joachin ;   et al.
2002-07-04
Method of forming an on-chip decoupling capacitor with bottom hardmask
Grant 6,387,754 - Dalton , et al. May 14, 2
2002-05-14
Method of forming an on-chip decoupling capacitor with bottom hardmask
App 20010036753 - Dalton, Timothy J. ;   et al.
2001-11-01

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