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Patent applications and USPTO patent grants for Kadiyala; Anirudh.The latest application filed is for "scan or jtag controllable capture clock generation".
Patent | Date |
---|---|
Scan or JTAG controllable capture clock generation Grant 9,903,913 - Gorti , et al. February 27, 2 | 2018-02-27 |
On-chip clock controller Grant 9,740,234 - Kim , et al. August 22, 2 | 2017-08-22 |
Scan Or Jtag Controllable Capture Clock Generation App 20140359386 - Gorti; Atchyuth ;   et al. | 2014-12-04 |
Modeling Memory Arrays For Test Pattern Analysis App 20140181602 - Mittal; Vibhor ;   et al. | 2014-06-26 |
Configurable Mux-D scan flip-flop design Grant 8,694,842 - Gorti , et al. April 8, 2 | 2014-04-08 |
Scan or JTAG controllable capture clock generation Grant 8,633,725 - Gorti , et al. January 21, 2 | 2014-01-21 |
Configurable Mux-d Scan Flip-flop Design App 20120124434 - Gorti; Atchyuth K. ;   et al. | 2012-05-17 |
Scan Or Jtag Controllable Capture Clock Generation App 20120062266 - GORTI; ATCHYUTH K. ;   et al. | 2012-03-15 |
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