| Patent | Date |
|---|
Gate cut with high selectivity to preserve interlevel dielectric layer
Grant 10,957,544 - Greene , et al. March 23, 2 | 2021-03-23 |
Method and structure for enabling high aspect ratio sacrificial gates
Grant 10,629,698 - Cheng , et al. | 2020-04-21 |
Gate cut with high selectivity to preserve interlevel dielectric layer
Grant 10,586,706 - Greene , et al. | 2020-03-10 |
Method and structure for enabling controlled spacer RIE
Grant 10,446,452 - Cheng , et al. Oc | 2019-10-15 |
Gate Cut With High Selectivity To Preserve Interlevel Dielectric Layer
App 20180315606 - Greene; Andrew M. ; et al. | 2018-11-01 |
Method And Structure For Enabling High Aspect Ratio Sacrificial Gates
App 20180122643 - CHENG; Kangguo ; et al. | 2018-05-03 |
Method and structure for enabling high aspect ratio sacrificial gates
Grant 9,842,739 - Cheng , et al. December 12, 2 | 2017-12-12 |
Gate cut with high selectivity to preserve interlevel dielectric layer
Grant 9,837,276 - Greene , et al. December 5, 2 | 2017-12-05 |
Method to form dual channel semiconductor material fins
Grant 9,786,666 - Cheng , et al. October 10, 2 | 2017-10-10 |
Method And Structure For Enabling Controlled Spacer Rie
App 20170221773 - Cheng; Kangguo ; et al. | 2017-08-03 |
Gate Cut With High Selectivity To Preserve Interlevel Dielectric Layer
App 20170221721 - Greene; Andrew M. ; et al. | 2017-08-03 |
Gate cut with high selectivity to preserve interlevel dielectric layer
Grant 9,659,786 - Greene , et al. May 23, 2 | 2017-05-23 |
Method and structure for enabling high aspect ratio sacrificial gates
Grant 9,659,779 - Cheng , et al. May 23, 2 | 2017-05-23 |
Method and structure for enabling controlled spacer RIE
Grant 9,627,277 - Cheng , et al. April 18, 2 | 2017-04-18 |
Trench formation for dielectric filled cut region
Grant 9,601,335 - Greene , et al. March 21, 2 | 2017-03-21 |
Trench formation for dielectric filled cut region
Grant 9,601,366 - Greene , et al. March 21, 2 | 2017-03-21 |
Trench Formation For Dielectric Filled Cut Region
App 20170033196 - Greene; Andrew M. ; et al. | 2017-02-02 |
Trench Formation For Dielectric Filled Cut Region
App 20170033000 - Greene; Andrew M. ; et al. | 2017-02-02 |
Gate Cut With High Selectivity To Preserve Interlevel Dielectric Layer
App 20170018437 - Greene; Andrew M. ; et al. | 2017-01-19 |
Gate Cut With High Selectivity To Preserve Interlevel Dielectric Layer
App 20170018628 - Greene; Andrew M. ; et al. | 2017-01-19 |
Junction overlap control in a semiconductor device using a sacrificial spacer layer
Grant 9,530,864 - Bentley , et al. December 27, 2 | 2016-12-27 |
Method To Form Dual Channel Semiconductor Material Fins
App 20160372473 - Cheng; Kangguo ; et al. | 2016-12-22 |
Method And Structure For Enabling Controlled Spacer Rie
App 20160365292 - Cheng; Kangguo ; et al. | 2016-12-15 |
Method And Structure For Enabling High Aspect Ratio Sacrificial Gates
App 20160233095 - CHENG; Kangguo ; et al. | 2016-08-11 |
Method to form dual channel semiconductor material fins
Grant 9,362,179 - Cheng , et al. June 7, 2 | 2016-06-07 |
Wafer backside particle mitigation
Grant 9,318,347 - Bergendahl , et al. April 19, 2 | 2016-04-19 |
Method and structure for enabling high aspect ratio sacrificial gates
Grant 9,318,574 - Cheng , et al. April 19, 2 | 2016-04-19 |
Methods Of Patterning Features Having Differing Widths
App 20160064236 - Jang; Linus ; et al. | 2016-03-03 |
Wafer Backside Particle Mitigation
App 20160049311 - Bergendahl; Marc A. ; et al. | 2016-02-18 |
Junction Overlap Control In A Semiconductor Device Using A Sacrificial Spacer Layer
App 20150380514 - Bentley; Steven J. ; et al. | 2015-12-31 |
Method And Structure For Enabling High Aspect Ratio Sacrificial Gates
App 20150372127 - CHENG; Kangguo ; et al. | 2015-12-24 |
Method And Structure For Enabling High Aspect Ratio Sacrificial Gates
App 20150372113 - CHENG; Kangguo ; et al. | 2015-12-24 |
Methods of patterning features having differing widths
Grant 9,214,360 - Jang , et al. December 15, 2 | 2015-12-15 |
Wafer backside particle mitigation
Grant 9,184,042 - Bergendahl , et al. November 10, 2 | 2015-11-10 |
Methods Of Patterning Features Having Differing Widths
App 20140329388 - Jang; Linus ; et al. | 2014-11-06 |
Method of simultaneously forming multiple structures having different critical dimensions using sidewall transfer
Grant 8,735,296 - Jung , et al. May 27, 2 | 2014-05-27 |
Three photomask sidewall image transfer method
Grant 8,716,133 - Chen , et al. May 6, 2 | 2014-05-06 |
Sidewall image transfer process with multiple critical dimensions
Grant 8,673,165 - Raghunathan , et al. March 18, 2 | 2014-03-18 |
Three Photomask Sidewall Image Transfer Method
App 20140057436 - Chen; Shyng-Tsong ; et al. | 2014-02-27 |
Image transfer process employing a hard mask layer
Grant 8,637,406 - Jung , et al. January 28, 2 | 2014-01-28 |
Image Transfer Process Employing A Hard Mask Layer
App 20140023834 - Jung; Ryan O. ; et al. | 2014-01-23 |
Image Transfer Process Employing A Hard Mask Layer
App 20140024219 - Jung; Ryan O. ; et al. | 2014-01-23 |
Method Of Simultaneously Forming Multiple Structures Having Different Critical Dimensions Using Sidewall Transfer
App 20140024209 - Jung; Ryan O. ; et al. | 2014-01-23 |
Sidewall Image Transfer Process With Multiple Critical Dimensions
App 20130089984 - Raghunathan; Sudharshanan ; et al. | 2013-04-11 |
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