Jung; Kyoung-Ho

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jung; Kyoung-Ho.The latest application filed is for "semiconductor device and method of manufacturing the same".

Company Profile

5.8.13

Jung; Kyoung-Ho - Suwon-si KR
Jung; Kyoung-Ho - Yongin-si KR
Jung; Kyoung-Ho - Gyeonggi-do KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Device And Method Of Manufacturing The Same App 20210376099 - Cho; Eunae ; et al.	2021-12-02
Semiconductor device and method of manufacturing the same Grant 11,127,828 - Cho , et al. September 21, 2	2021-09-21
Semiconductor device having a gate and method of forming the same Grant 10,886,280 - Lee , et al. January 5, 2	2021-01-05
Semiconductor Device Having A Gate And Method Of Forming The Same App 20200027885 - Lee; Dongjin ; et al.	2020-01-23
Semiconductor device having a gate and method of forming the same Grant 10,446,557 - Lee , et al. Oc	2019-10-15
Semiconductor Device And Method Of Manufacturing The Same App 20190312119 - CHO; Eunae ; et al.	2019-10-10
Semiconductor device and method of manufacturing the same Grant 10,325,992 - Cho , et al.	2019-06-18
Semiconductor Device Having A Gate And Method Of Forming The Same App 20170084615 - Lee; Dongjin ; et al.	2017-03-23
Semiconductor Device And Method Of Manufacturing The Same App 20160260813 - CHO; Eunae ; et al.	2016-09-08
Semiconductor Device Including Transistors App 20160163708 - JANG; SUNG-HO ; et al.	2016-06-09
Three-dimensional display device Grant 9,190,022 - Yun , et al. November 17, 2	2015-11-17
Three-dimensional Display Device App 20130229449 - YUN; Hae-Young ; et al.	2013-09-05
Semiconductor Devices Using Shaped Gate Electrodes App 20130043519 - Moon; Joon-seok ; et al.	2013-02-21
Three-dimensional Display Device App 20110050683 - Yun; Hae-Young ; et al.	2011-03-03
Method of fabricating semiconductor device for reducing thermal burden on impurity regions of peripheral circuit region Grant 7,879,703 - Jung , et al. February 1, 2	2011-02-01
Method for fabricating multiple FETs of different types Grant 7,700,445 - Jang , et al. April 20, 2	2010-04-20
Semiconductor device including active pattern with channel recess, and method of fabricating the same Grant 7,667,266 - Jung , et al. February 23, 2	2010-02-23
Method Of Fabricating Semiconductor Device For Reducing Thermal Burden On Impurity Regions Of Peripheral Circuit Region App 20090186471 - Jung; Kyoung-Ho ; et al.	2009-07-23
Semiconductor Device Including Active Pattern With Channel Recess, And Method Of Fabricating The Same App 20080303085 - JUNG; Kyoung-Ho ; et al.	2008-12-11
Method for fabricating multiple FETs of different types App 20070298599 - Jang; Se-Myeong ; et al.	2007-12-27

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