loadpatents
name:-0.0059390068054199
name:-0.0086908340454102
name:-0.0010809898376465
Jun; Hong-Shin Patent Filings

Jun; Hong-Shin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jun; Hong-Shin.The latest application filed is for "programmable test clock generation responsive to clock signal characterization".

Company Profile
0.6.4
  • Jun; Hong-Shin - San Jose CA
  • Jun; Hong-Shin - Seoul KR
  • Jun; Hong-shin - Seongnam KR
  • Jun, Hong-shin - Seongnam-city KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Programmable test clock generation responsive to clock signal characterization
Grant 7,844,875 - Jun , et al. November 30, 2
2010-11-30
Programmable Test Clock Generation Responsive to Clock Signal Characterization
App 20090183046 - JUN; Hong-Shin ;   et al.
2009-07-16
Programmable in-situ delay fault test clock generator
Grant 7,536,617 - Jun , et al. May 19, 2
2009-05-19
Programmable in-situ delay fault test clock generator
App 20060242474 - Jun; Hong-Shin ;   et al.
2006-10-26
Semiconductor integrated circuit device with scan signal converting circuit
Grant 6,742,151 - Park , et al. May 25, 2
2004-05-25
Programmable built-in self-test system for semiconductor memory device
Grant 6,658,611 - Jun December 2, 2
2003-12-02
Semiconductor Device Including Built-in Redundancy Analysis Circuit For Simultaneously Testing And Analyzing Failure Of A Plurality Of Memories And Method For Analyzing The Failure Of The Plurality Of Memories
Grant 6,603,691 - Yoo , et al. August 5, 2
2003-08-05
Semiconductor device including built-in redundancy analysis circuit for simultaneously testing and analyzing failure of a plurality of memories and method for analyzing the failure of the plurality of memories
App 20020159305 - Yoo, Young-Doo ;   et al.
2002-10-31
Semiconductor integrated circuit device with scan signal converting circuit
App 20010011361 - Park, Hee-Min ;   et al.
2001-08-02
Apparatus and method for generating addresses in a SRAM built-in self test circuit using a single-direction counter
Grant 6,148,426 - Kim , et al. November 14, 2
2000-11-14

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