| Patent | Date |
|---|
Controlling the latchup effect
Grant 9,759,764 - Lin , et al. September 12, 2 | 2017-09-12 |
Controlling the latchup effect
Grant 8,912,014 - Lin , et al. December 16, 2 | 2014-12-16 |
Apparatus And Method For A Metal Oxide Semiconductor Field Effect Transistor With Source Side Punch-through Protection Implant
App 20140038378 - KHAN; Imran ; et al. | 2014-02-06 |
Apparatus and method for a metal oxide semiconductor field effect transistor with source side punch-through protection implant
Grant 8,633,083 - Khan , et al. January 21, 2 | 2014-01-21 |
Junction leakage suppression in memory devices
Grant 8,536,011 - Ahmed , et al. September 17, 2 | 2013-09-17 |
Apparatus and method for a metal oxide semiconductor field effect transistor with source side punch-through protection implant
Grant 8,530,977 - Khan , et al. September 10, 2 | 2013-09-10 |
High-Voltage MOSFET with High Breakdown Voltage and Low On-Resistance and Method of Manufacturing the Same
App 20120228704 - Ju; Dong-Hyuk | 2012-09-13 |
Junction Leakage Suppression In Memory Devices
App 20110176363 - AHMED; Shibly S. ; et al. | 2011-07-21 |
Junction leakage suppression in memory devices
Grant 7,939,440 - Ahmed , et al. May 10, 2 | 2011-05-10 |
Method to obtain multiple gate thicknesses using in-situ gate etch mask approach
Grant 7,776,696 - Khan , et al. August 17, 2 | 2010-08-17 |
Method To Obtain Multiple Gate Thicknesses Using In-situ Gate Etch Mask Approach
App 20080268630 - Khan; Imran ; et al. | 2008-10-30 |
Dual SOI film thickness for body resistance control
Grant 7,253,068 - Ju , et al. August 7, 2 | 2007-08-07 |
Junction leakage suppression in memory devices
App 20070052002 - Ahmed; Shibly S. ; et al. | 2007-03-08 |
SOI device with structure for enhancing carrier recombination and method of fabricating same
Grant 7,122,863 - Ju , et al. October 17, 2 | 2006-10-17 |
Method for fabricating a memory device
Grant 7,026,230 - Ju April 11, 2 | 2006-04-11 |
High voltage transistor scaling tilt ion implant method
Grant 7,011,998 - Ju , et al. March 14, 2 | 2006-03-14 |
Flash memory cell having reduced leakage current
Grant 6,897,518 - Park , et al. May 24, 2 | 2005-05-24 |
Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure
Grant 6,717,212 - Ju , et al. April 6, 2 | 2004-04-06 |
SOI MOSFET having amorphized source drain and method of fabrication
Grant 6,713,819 - En , et al. March 30, 2 | 2004-03-30 |
Method of fabricating multi-thickness silicide device formed by disposable spacers
Grant 6,566,213 - En , et al. May 20, 2 | 2003-05-20 |
Method of forming differential spacers for individual optimization of n-channel and p-channel transistors
Grant 6,562,676 - Ju May 13, 2 | 2003-05-13 |
SOI MOSFET and method of fabrication
Grant 6,548,361 - En , et al. April 15, 2 | 2003-04-15 |
SOI device with structure for enhancing carrier recombination and method of fabricating same
Grant 6,512,244 - Ju , et al. January 28, 2 | 2003-01-28 |
Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure
App 20020185685 - Ju, Dong-Hyuk ; et al. | 2002-12-12 |
Silicon wafer including both bulk and SOI regions and method for forming same on a bulk silicon wafer
Grant 6,465,852 - Ju October 15, 2 | 2002-10-15 |
Multi-thickness silicide device formed by disposable spacers
App 20020142524 - En, William G. ; et al. | 2002-10-03 |
Method of making a multi-thickness silicide SOI device
Grant 6,441,433 - En , et al. August 27, 2 | 2002-08-27 |
Polysilicon insulator material in semiconductor-on-insulator (SOI) structure
Grant 6,424,009 - Ju July 23, 2 | 2002-07-23 |
Field effect transistor with non-floating body and method for forming same on a bulk silicon wafer
Grant 6,376,286 - Ju April 23, 2 | 2002-04-23 |
Field Effect Transitor With Non-floating Body And Method For Forming Same On A Bulk Silicon Wafer
App 20020025636 - JU, DONG-HYUK | 2002-02-28 |
Heat Removal By Removal Of Buried Oxide In Isolation Areas
App 20020008283 - JU, DONG-HYUK | 2002-01-24 |
Depleted sidewall-poly LDD transistor
Grant 6,300,207 - Ju October 9, 2 | 2001-10-09 |
CMOS processing employing zero degree halo implant for P-channel transistor
Grant 6,232,166 - Ju , et al. May 15, 2 | 2001-05-15 |
Field effect transistor with non-floating body and method for forming same on a bulk silicon wafer
Grant 6,229,187 - Ju May 8, 2 | 2001-05-08 |
Fabrication of raised source-drain transistor devices
Grant 6,051,473 - Ishida , et al. April 18, 2 | 2000-04-18 |
Fabrication process employing a single dopant implant for formation of a drain extension region and a drain region of an LDD MOSFET using enhanced lateral diffusion
Grant 6,008,099 - Sultan , et al. December 28, 1 | 1999-12-28 |
Silicidation and deep source-drain formation prior to source-drain extension formation
Grant 5,998,272 - Ishida , et al. December 7, 1 | 1999-12-07 |
CMOS processing employing separate spacers for independently optimized transistor performance
Grant 5,943,565 - Ju August 24, 1 | 1999-08-24 |
Heat treating nitrogen implanted gate electrode layer for improved gate electrode etch profile
Grant 5,879,975 - Karlsson , et al. March 9, 1 | 1999-03-09 |
CMOS processing employing removable sidewall spacers for independently optimized N- and P-channel transistor performance
Grant 5,846,857 - Ju December 8, 1 | 1998-12-08 |
Depleted sidewall-poly LDD transistor
Grant 5,804,856 - Ju September 8, 1 | 1998-09-08 |
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