loadpatents
name:-0.013339042663574
name:-0.024486064910889
name:-0.0028131008148193
Joshi; Rajiv Vasant Patent Filings

Joshi; Rajiv Vasant

Patent Applications and Registrations

Patent applications and USPTO patent grants for Joshi; Rajiv Vasant.The latest application filed is for "massive multi-dimensionality failure analytics with smart converged bounds".

Company Profile
2.22.11
  • Joshi; Rajiv Vasant - Yorktown Heights NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Massive multi-dimensionality failure analytics with smart converged bounds
Grant 10,139,446 - Joshi , et al. Nov
2018-11-27
Massive Multi-dimensionality Failure Analytics With Smart Converged Bounds
App 20170059649 - Joshi; Rajiv Vasant ;   et al.
2017-03-02
Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture
Grant 9,256,704 - Acar , et al. February 9, 2
2016-02-09
Efficient Deployment Of Table Lookup (tlu) In An Enterprise-level Scalable Circuit Simulation Architecture
App 20150220671 - Acar; Emrah ;   et al.
2015-08-06
Analyzing a patterning process using a model of yield
Grant 8,880,382 - Bagheri , et al. November 4, 2
2014-11-04
Analyzing a patterning process using a model of yield
Grant 8,682,634 - Bagheri , et al. March 25, 2
2014-03-25
Analyzing A Patterning Process Using A Model Of Yield
App 20130185045 - BAGHERI; Saeed ;   et al.
2013-07-18
Analyzing A Patterning Process Using A Model Of Yield
App 20130185046 - Bagheri; Saeed ;   et al.
2013-07-18
Leakage current mitigation in a semiconductor device
Grant 7,911,263 - Guo , et al. March 22, 2
2011-03-22
Leakage Current Mitigation in a Semiconductor Device
App 20100327958 - Guo; Jong-Ru ;   et al.
2010-12-30
Body Capacitor For Soi Memory
App 20070202637 - Mandelman; Jack A. ;   et al.
2007-08-30
Body capacitor for SOI memory description
Grant 7,232,745 - Mandelman , et al. June 19, 2
2007-06-19
Method and apparatus for superimposing differential signals onto a set of binary signals to increase the information-carrying capacity of the original set of signals
Grant 7,158,604 - Emma , et al. January 2, 2
2007-01-02
Body capacitor for SOI memory description
App 20060189110 - Mandelman; Jack A. ;   et al.
2006-08-24
Soft metal conductor and method of making
Grant 6,943,105 - Joshi September 13, 2
2005-09-13
Soft metal conductor and method of making
App 20040180541 - Joshi, Rajiv Vasant
2004-09-16
Dual-RIE structure for via/line interconnections
Grant 6,433,436 - Feild , et al. August 13, 2
2002-08-13
Soft metal conductor and method of making
App 20020096768 - Joshi, Rajiv Vasant
2002-07-25
Soft metal conductor and method of making
Grant 6,335,569 - Joshi January 1, 2
2002-01-01
Provably correct storage arrays
Grant 6,279,144 - Henkels , et al. August 21, 2
2001-08-21
Embedded thermal conductors for semiconductor chips
Grant 6,100,199 - Joshi , et al. August 8, 2
2000-08-08
Method and apparatus for transposing differential signals onto a set of binary signals to increase the information-carrying capacity of the original set of signals
Grant 6,038,260 - Emma , et al. March 14, 2
2000-03-14
Method of making a soft metal conductor
Grant 6,030,895 - Joshi , et al. February 29, 2
2000-02-29
Design of provably correct storage arrays
Grant 5,995,425 - Henkels, deceased , et al. November 30, 1
1999-11-30
Embedded thermal conductors for semiconductor chips
Grant 5,955,781 - Joshi , et al. September 21, 1
1999-09-21
Parameterized cells for generating dense layouts of VLSI circuits
Grant 5,920,486 - Beahm , et al. July 6, 1
1999-07-06
Emulating quasi-synchronous DRAM with asynchronous DRAM
Grant 5,901,304 - Hwang , et al. May 4, 1
1999-05-04
High aspect ratio low resistivity lines/vias by surface diffusion
Grant 5,897,370 - Joshi , et al. April 27, 1
1999-04-27
Rule-based method for designing user interfaces for applications
Grant 5,812,847 - Joshi , et al. September 22, 1
1998-09-22

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