Joshi; Rajeev

Patent Applications and Registrations

Patent applications and USPTO patent grants for Joshi; Rajeev.The latest application filed is for "semiconductor die package and method for making the same".

Company Profile

1.67.59

Joshi; Rajeev - Cupertino CA
Joshi; Rajeev - San Jose CA
Joshi; Rajeev - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor die package and method for making the same Grant 9,159,656 - Jeon , et al. October 13, 2	2015-10-13
Method of forming a magnetics package Grant 9,053,853 - Joshi June 9, 2	2015-06-09
Semiconductor Die Package And Method For Making The Same App 20140167238 - Jeon; Oseob ; et al.	2014-06-19
DC/DC converter power module package incorporating a stacked controller and construction methodology Grant 8,679,896 - Joshi , et al. March 25, 2	2014-03-25
Semiconductor die package and method for making the same Grant 8,664,752 - Jeon , et al. March 4, 2	2014-03-04
Leadframe based photo voltaic electronic assembly Grant 8,609,978 - Joshi December 17, 2	2013-12-17
Substrate based unmolded package Grant 8,541,890 - Joshi September 24, 2	2013-09-24
Integrated circuit package including an embedded power stage wherein a first field effect transistor (FET) and a second FET are electrically coupled therein Grant 8,524,532 - Joshi September 3, 2	2013-09-03
Embedded Power Stage Module App 20130221442 - JOSHI; Rajeev	2013-08-29
DC/DC Converter Power Module Package Incorporating a Stacked Controller and Construction Methodology App 20130214399 - Joshi; Rajeev ; et al.	2013-08-22
Dc/dc Convertor Power Module Package Incorporating A Stacked Controller And Construction Methodology App 20120326287 - Joshi; Rajeev ; et al.	2012-12-27
Leadframe based magnetics package Grant 8,339,231 - Joshi December 25, 2	2012-12-25
Semiconductor Die Package And Method For Making The Same App 20120181675 - Jeon; Oseob ; et al.	2012-07-19
Semiconductor die package and method for making the same Grant 8,183,088 - Jeon , et al. May 22, 2	2012-05-22
Semiconductor Die Package Including Multiple Dies And A Common Node Structure App 20120064667 - Joshi; Rajeev ; et al.	2012-03-15
Method of providing a RF shield of an electronic device Grant 7,971,350 - Joshi July 5, 2	2011-07-05
Dual metal stud bumping for flip chip applications Grant 7,932,171 - Joshi , et al. April 26, 2	2011-04-26
High performance multi-chip flip chip package Grant 7,892,884 - Joshi February 22, 2	2011-02-22
Thin, thermally enhanced flip chip in a leaded molded package Grant 7,821,124 - Joshi , et al. October 26, 2	2010-10-26
Semiconductor Die Package And Method For Making The Same App 20100258925 - Jeon; Oseob ; et al.	2010-10-14
Substrate based unmolded package Grant 7,790,513 - Joshi September 7, 2	2010-09-07
Semiconductor die package and method for making the same Grant 7,772,681 - Joshi , et al. August 10, 2	2010-08-10
Semiconductor Die Package Including Multiple Dies And A Common Node Structure App 20100090331 - Joshi; Rajeev ; et al.	2010-04-15
Substrate based unmolded package Grant 7,682,877 - Joshi , et al. March 23, 2	2010-03-23
Wafer-level chip scale package and method for fabricating and using the same Grant 7,632,719 - Choi , et al. December 15, 2	2009-12-15
Semiconductor die package including multiple dies and a common node structure Grant 7,618,896 - Joshi , et al. November 17, 2	2009-11-17
High Performance Multi-chip Flip Chip Package App 20090230540 - Joshi; Rajeev	2009-09-17
Flip chip in leaded molded package and method of manufacture thereof Grant 7,582,956 - Joshi , et al. September 1, 2	2009-09-01
Dual Metal Stud Bumping For Flip Chip Applications App 20090186452 - Joshi; Rajeev ; et al.	2009-07-23
High performance multi-chip flip chip package Grant 7,537,958 - Joshi May 26, 2	2009-05-26
Substrate Based Unmolded Package App 20090130802 - Joshi; Rajeev	2009-05-21
Wafer-level Chip Scale Package And Method For Fabricating And Using The Same App 20090111219 - Choi; Seung-Yong ; et al.	2009-04-30
Lead frame structure with aperture or groove for flip chip in a leaded molded package Grant 7,525,179 - Joshi , et al. April 28, 2	2009-04-28
Substrate based unmolded package Grant 7,504,281 - Joshi March 17, 2	2009-03-17
Dual metal stud bumping for flip chip applications Grant 7,501,337 - Joshi , et al. March 10, 2	2009-03-10
Method of and apparatus for providing an RF shield on an electronic component App 20090032300 - Joshi; Rajeev	2009-02-05
Substrate based unmolded package Grant 7,439,613 - Joshi , et al. October 21, 2	2008-10-21
Substrate Based Unmolded Package App 20080213946 - Joshi; Rajeev ; et al.	2008-09-04
Leadframe based photo voltaic electronic assembly App 20080190480 - Joshi; Rajeev	2008-08-14
Unmolded package for a semiconductor device Grant 7,393,718 - Joshi July 1, 2	2008-07-01
Thin, Thermally Enhanced Flip Chip In A Leaded Molded Package App 20080105957 - Joshi; Rajeev ; et al.	2008-05-08
Method of assembly for multi-flip chip on lead frame on overmolded IC package Grant 7,335,532 - Noquil , et al. February 26, 2	2008-02-26
Thin, thermally enhanced molded package with leadframe having protruding region Grant 7,332,806 - Joshi , et al. February 19, 2	2008-02-19
Flip Chip In Leaded Molded Package And Method Of Manufacture Thereof App 20080036056 - Joshi; Rajeev ; et al.	2008-02-14
Semiconductor die package including multiple dies and a common node structure App 20070249092 - Joshi; Rajeev ; et al.	2007-10-25
Dual metal stud bumping for flip chip applications Grant 7,271,497 - Joshi , et al. September 18, 2	2007-09-18
Method to manufacture a universal footprint for a package with exposed chip Grant 7,256,479 - Noquil , et al. August 14, 2	2007-08-14
Flip chip in leaded molded package and method of manufacture thereof Grant 7,215,011 - Joshi , et al. May 8, 2	2007-05-08
Method Of Assembly For Multi-flip Chip On Lead Frame On Overmolded Ic Package App 20070072347 - Noquil; Jonathan A. ; et al.	2007-03-29
Surface mount multi-channel optocoupler Grant 7,196,313 - Quinones , et al. March 27, 2	2007-03-27
Semiconductor die package and method for making the same App 20070001278 - Jeon; Oseob ; et al.	2007-01-04
Flip chip in leaded molded package and method of manufacture thereof Grant 7,154,168 - Joshi , et al. December 26, 2	2006-12-26
Multi-flip chip on lead frame on over molded IC package and method of assembly Grant 7,154,186 - Noquil , et al. December 26, 2	2006-12-26
Lead frame structure with aperture or groove for flip chip in a leaded molded package App 20060284291 - Joshi; Rajeev ; et al.	2006-12-21
Flip chip substrate design Grant 7,101,734 - Granada , et al. September 5, 2	2006-09-05
Dual metal stud bumping for flip chip applications App 20060189116 - Joshi; Rajeev ; et al.	2006-08-24
Lead frame structure with aperture or groove for flip chip in a leaded molded package Grant 7,081,666 - Joshi , et al. July 25, 2	2006-07-25
Method to manufacture a universal footprint for a package with exposed chip App 20060151861 - Noquil; Jonathan A. ; et al.	2006-07-13
Substrate based unmolded package including lead frame structure and semiconductor die Grant 7,061,077 - Joshi June 13, 2	2006-06-13
Flip chip in leaded molded package with two dies Grant 7,029,947 - Joshi April 18, 2	2006-04-18
Method for making a semiconductor die package Grant 7,022,548 - Joshi , et al. April 4, 2	2006-04-04
Passivation scheme for bumped wafers Grant 7,008,868 - Joshi March 7, 2	2006-03-07
High performance multi-chip flip chip package Grant 6,992,384 - Joshi January 31, 2	2006-01-31
Substrate based unmolded package App 20060006550 - Joshi; Rajeev	2006-01-12
Substrate based unmolded package App 20060003492 - Joshi; Rajeev	2006-01-05
Flip chip in leaded molded package and method of manufacture thereof App 20050280126 - Joshi, Rajeev ; et al.	2005-12-22
Unmolded package for a semiconductor device App 20050280161 - Joshi, Rajeev	2005-12-22
Unmolded package for a semiconductor device Grant 6,953,998 - Joshi October 11, 2	2005-10-11
Surface mount multi-channel optocoupler App 20050218300 - Quinones, Maria Clemens Y. ; et al.	2005-10-06
Flip chip in leaded molded package and method of manufacture thereof Grant 6,949,410 - Joshi , et al. September 27, 2	2005-09-27
Multi-flip chip on lead frame on over molded IC package and method of assembly App 20050206010 - Noquil, Jonathan A. ; et al.	2005-09-22
Wafer-level chip scale package and method for fabricating and using the same App 20050176233 - Joshi, Rajeev ; et al.	2005-08-11
Filp chip in leaded molded package and method of manufacture thereof App 20050167848 - Joshi, Rajeev ; et al.	2005-08-04
Lead frame structure with aperture or groove for flip chip in a leaded molded package App 20050133893 - Joshi, Rajeev ; et al.	2005-06-23
Thin, thermally enhanced flip chip in a leaded molded package App 20050127483 - Joshi, Rajeev ; et al.	2005-06-16
Thin, thermally enhanced flip chip in a leaded molded package Grant 6,891,256 - Joshi , et al. May 10, 2	2005-05-10
Lead frame structure with aperture or groove for flip chip in a leaded molded package Grant 6,867,481 - Joshi , et al. March 15, 2	2005-03-15
Flip chip substrate design App 20050051878 - Granada, Honorio T. ; et al.	2005-03-10
Wafer-level chip scale package and method for fabricating and using the same App 20050012225 - Choi, Seung-Yong ; et al.	2005-01-20
Structure of integrated trace of chip package Grant 6,836,023 - Joshi , et al. December 28, 2	2004-12-28
Passivation scheme for bumped wafers App 20040241977 - Joshi, Rajeev	2004-12-02
Substrate based unmolded package App 20040207052 - Joshi, Rajeev ; et al.	2004-10-21
Multichip module including substrate with an array of interconnect structures Grant 6,806,580 - Joshi , et al. October 19, 2	2004-10-19
Flip chip in leaded molded package with two dies App 20040201086 - Joshi, Rajeev	2004-10-14
Lead frame structure with aperture or groove for flip chip in a leaded molded package App 20040201081 - Joshi, Rajeev ; et al.	2004-10-14
Wafer-level chip scale package and method for fabricating and using the same App 20040191955 - Joshi, Rajeev ; et al.	2004-09-30
Flip chip in leaded molded package with two dies Grant 6,798,044 - Joshi September 28, 2	2004-09-28
Dual metal stud bumping for flip chip applications App 20040178481 - Joshi, Rajeev ; et al.	2004-09-16
Unmolded package for a semiconductor device App 20040164386 - Joshi, Rajeev	2004-08-26
High performance multi-chip flip chip package App 20040159939 - Joshi, Rajeev	2004-08-19
Semiconductor die including conductive columns App 20040137724 - Joshi, Rajeev ; et al.	2004-07-15
Multichip Module Including Substrate With An Array Of Interconnect Structures App 20040125573 - Joshi, Rajeev ; et al.	2004-07-01
Passivation scheme for bumped wafers Grant 6,753,605 - Joshi June 22, 2	2004-06-22
Wafer-level coated copper stud bumps Grant 6,731,003 - Joshi , et al. May 4, 2	2004-05-04
Flip chip in leaded molded package and method of manufacture thereof Grant 6,720,642 - Joshi , et al. April 13, 2	2004-04-13
Flip chip in leaded molded package and method of manufacture thereof App 20040056364 - Joshi, Rajeev ; et al.	2004-03-25
Substrate based unmolded package including lead frame structure and semiconductor die App 20040041242 - Joshi, Rajeev	2004-03-04
High performance multi-chip flip chip package Grant 6,696,321 - Joshi February 24, 2	2004-02-24
Semiconductor die including conductive columns Grant 6,683,375 - Joshi , et al. January 27, 2	2004-01-27
Flip chip substrate design Grant 6,661,082 - Granada , et al. December 9, 2	2003-12-09
Structure of integrated trace of chip package App 20030197278 - Joshi, Rajeev ; et al.	2003-10-23
Surface mountable optocoupler package Grant 6,633,030 - Joshi October 14, 2	2003-10-14
High performance multi-chip flip package Grant 6,627,991 - Joshi September 30, 2	2003-09-30
Wafer-level coated copper stud bumps App 20030173684 - Joshi, Rajeev ; et al.	2003-09-18
High performance multi-chip flip chip package App 20030122247 - Joshi, Rajeev	2003-07-03
High performance multi-chip flip chip package App 20030107126 - Joshi, Rajeev	2003-06-12
Semiconductor die package with improved thermal and electrical performance Grant 6,566,749 - Joshi , et al. May 20, 2	2003-05-20
Thin, thermally enhanced flip chip in a leaded molded package App 20030075786 - Joshi, Rajeev ; et al.	2003-04-24
Surface mountable optocoupler package App 20030042403 - Joshi, Rajeev	2003-03-06
Unmolded package for a semiconductor device App 20030011005 - Joshi, Rajeev	2003-01-16
Semiconductor die including conductive columns App 20020192935 - Joshi, Rajeev ; et al.	2002-12-19
High performance multi-chip flip chip package Grant 6,489,678 - Joshi December 3, 2	2002-12-03
Unmolded package for a semiconductor device Grant 6,469,384 - Joshi October 22, 2	2002-10-22
Unmolded package for a semiconductor device App 20020100962 - Joshi, Rajeev	2002-08-01
Flip chip in leaded molded package with two dies App 20020066950 - Joshi, Rajeev	2002-06-06
Passivation scheme for bumped wafers App 20020066959 - Joshi, Rajeev	2002-06-06
High performance flip chip package Grant 6,133,634 - Joshi October 17, 2	2000-10-17
Thermally enhanced micro-ball grid array package Grant 5,789,809 - Joshi August 4, 1	1998-08-04
Method for making a carrier based IC packaging arrangement Grant 5,765,280 - Joshi June 16, 1	1998-06-16
Carrier based IC packaging arrangement Grant 5,637,916 - Joshi June 10, 1	1997-06-10