Josephides; Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Josephides; Michael.The latest application filed is for "waiver mechanism for physical verification of system designs".

Company Profile

0.4.5

Josephides; Michael - Broomfield CO
Josephides; Michael - Louisville CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Waiver mechanism for physical verification of system designs Grant 8,046,726 - Lakshmanan , et al. October 25, 2	2011-10-25
Waiver Mechanism For Physical Verification Of System Designs App 20100070936 - Lakshmanan; Viswanathan ; et al.	2010-03-18
Method of automating place and route corrections for an integrated circuit design from physical design validation Grant 7,302,654 - Lakshmanan , et al. November 27, 2	2007-11-27
Method of implementing an engineering change order in an integrated circuit design by windows Grant 7,231,626 - Hoff , et al. June 12, 2	2007-06-12
Method of implementing an engineering change order in an integrated circuit design by windows App 20060136855 - Hoff; Jason K. ; et al.	2006-06-22
Method of automating place and route corrections for an integrated circuit design from physical design validation App 20060095883 - Lakshmanan; Viswanathan ; et al.	2006-05-04
Method of automating place and route corrections for an integrated circuit design from physical design validation App 20060090144 - Lakshmanan; Viswanathan ; et al.	2006-04-27
Chip design method for designing integrated circuit chips with embedded memories Grant 6,775,811 - Lakshmanan , et al. August 10, 2	2004-08-10
Chip design method for designing integrated circuit chips with embedded memories App 20030221177 - Lakshmanan, Viswanathan ; et al.	2003-11-27

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