loadpatents
name:-0.0073709487915039
name:-0.010106086730957
name:-0.0014429092407227
Jordan; Stephen D. Patent Filings

Jordan; Stephen D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jordan; Stephen D..The latest application filed is for "mapping logic for controlling loading of the select ram of an error data crossbar multiplexer".

Company Profile
0.7.4
  • Jordan; Stephen D. - Ft. Collins CO
  • Jordan; Stephen D - Ft Collins CO
  • Jordan; Stephen D - Fort Collins CO
  • Jordan, Stephen D. - Fort Collins CO
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Mapping logic for controlling loading of the select ram of an error data crossbar multiplexer
Grant 7,421,632 - Jordan , et al. September 2, 2
2008-09-02
Memory device fail summary data reduction for improved redundancy analysis
Grant 7,339,844 - Krech, Jr. , et al. March 4, 2
2008-03-04
Mapping logic for controlling loading of the select ram of an error data crossbar multiplexer
App 20070283197 - Jordan; Stephen D. ;   et al.
2007-12-06
Memory device fail summary data reduction for improved redundancy analysis
App 20070195618 - Krech; Alan S. JR. ;   et al.
2007-08-23
Memory tester uses arbitrary dynamic mappings to serialize vectors into transmitted sub-vectors and de-serialize received sub-vectors into vectors
Grant 7,076,714 - Cook, III , et al. July 11, 2
2006-07-11
Method and apparatus for no-latency conditional branching
Grant 6,968,545 - Krech, Jr. , et al. November 22, 2
2005-11-22
Memory tester has memory sets configurable for use as error catch RAM, Tag RAM's, buffer memories and stimulus log RAM
Grant 6,851,076 - Cook, III , et al. February 1, 2
2005-02-01
Memory tester uses arbitrary dynamic mappings to serialize vectors into transmitted sub-vectors and de-serialize received sub-vectors into vectors
App 20040078740 - Cook, John H. III ;   et al.
2004-04-22
Memory tester with enhanced post decode
Grant 6,687,861 - Jordan , et al. February 3, 2
2004-02-03
Method and apparatus for executing a program using primary, secondary and tertiary memories
Grant 6,598,112 - Jordan , et al. July 22, 2
2003-07-22
Algorithmically programmable memory tester with history FIFO's that aid in ERROR analysis and recovery
App 20020162046 - Krech, Alan S. JR. ;   et al.
2002-10-31

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