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Synchronization clocking scheme for small scalable multi-processor system
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Multidirectional configurable architecture for multi-processor system
Grant 7,764,511 - Lee , et al. July 27, 2 | 2010-07-27 |
Remote monitor module for power initialization of computer system
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Scalable computer system and reconfigurable chassis module thereof
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Symmetric multiprocessing computer and star interconnection architecture and cooling system thereof
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Symmetric Multiprocessing Computer and Star Interconnection Architecture and Cooling System Thereof
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Three-Dimensional Interconnection Architecture For Multiprocessor Computer
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Clustering System and Flexible Interconnection Architecture Thereof
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System and Method for Flexible SMP Configuration
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Synchronization clocking scheme for small scalable multi-processor system
App 20080046770 - Jong; Jyh Ming ; et al. | 2008-02-21 |
Blade Clustering System with SMP Capability and Redundant Clock Distribution Architecture Thereof
App 20080046774 - Hirai; Tomonori ; et al. | 2008-02-21 |
Multidirectional Configurable Architecture For Multi-processor System
App 20080046617 - Lee; Mario J.D. ; et al. | 2008-02-21 |
Chassis Partition Architecture For Multi-processor System
App 20080043405 - LEE; Mario J.D. ; et al. | 2008-02-21 |
Scalable Computer System and Reconfigurable Chassis Module Thereof
App 20080043427 - Lee; Mario J.D. ; et al. | 2008-02-21 |
Remote Monitor Module for Computer Initialization
App 20080046706 - Hirai; Tomonori ; et al. | 2008-02-21 |
Remote Monitor Module For Power Initialization Of Computer System
App 20080046707 - Hirai; Tomonori ; et al. | 2008-02-21 |
Automated calibration of I/O over a multi-variable eye window
Grant 7,296,104 - Smith , et al. November 13, 2 | 2007-11-13 |
Source synchronous I/O bus retimer
Grant 7,280,589 - Smith , et al. October 9, 2 | 2007-10-09 |
Source synchronous bus repeater
Grant 7,139,308 - Doblar , et al. November 21, 2 | 2006-11-21 |
Noise margin self-diagnostic receiver logic
Grant 7,130,340 - Jong , et al. October 31, 2 | 2006-10-31 |
Optical transmitter for transmitting a plurality of output signals
Grant 7,039,323 - Jong , et al. May 2, 2 | 2006-05-02 |
Automated calibration of I/O over a multi-variable eye window
App 20060009931 - Smith; Brian L. ; et al. | 2006-01-12 |
Automated calibration of I/O over a multi-variable eye window
Grant 6,944,692 - Smith , et al. September 13, 2 | 2005-09-13 |
Source synchronous receiver link initialization and input floating control by clock detection and DLL lock detection
Grant 6,937,680 - Fong , et al. August 30, 2 | 2005-08-30 |
System and method for testing operational transmissions of an integrated circuit
Grant 6,880,118 - Chen , et al. April 12, 2 | 2005-04-12 |
Double data rate (DDR) data strobe receiver
Grant 6,853,594 - Wu , et al. February 8, 2 | 2005-02-08 |
Double Data Rate (ddr) Data Strobe Receiver
App 20050018494 - Wu, Chung-Hsiao R. ; et al. | 2005-01-27 |
Source synchronous I/O bus retimer
App 20050018760 - Smith, Brian L. ; et al. | 2005-01-27 |
Method and apparatus for detecting valid clock signals at a clock receiver circuit
Grant 6,737,892 - Jong , et al. May 18, 2 | 2004-05-18 |
Bi-directional output buffer
Grant 6,690,191 - Wu , et al. February 10, 2 | 2004-02-10 |
Source synchronous bus repeater
App 20030189973 - Doblar, Drew G. ; et al. | 2003-10-09 |
Bi-directional output buffer
App 20030117172 - Wu, Chung-Hsiao R. ; et al. | 2003-06-26 |
I/O test methodology
App 20030080769 - Chen, Cecilia T. ; et al. | 2003-05-01 |
Automated calibration of I/O over a multi-variable eye window
App 20030051086 - Smith, Brian L. ; et al. | 2003-03-13 |
Apparatus For On-chip Reference Voltage Generator For Receivers In High Speed Single-ended Data Link
App 20030034829 - Wu, Chung-Hsiao R. ; et al. | 2003-02-20 |
Optical transmitter for transmitting a plurality of output signals
App 20030030872 - Jong, Jyh-Ming ; et al. | 2003-02-13 |
Optical receiver for receiving a plurality of input signals
App 20030030878 - Jong, Jyh-Ming ; et al. | 2003-02-13 |
Method and circuitry for a pre-emphasis scheme for single-ended center taped terminated high speed digital signaling
Grant 6,518,792 - Jong , et al. February 11, 2 | 2003-02-11 |
Data strobe receiver
Grant 6,512,704 - Wu , et al. January 28, 2 | 2003-01-28 |
Method And Circuitry For A Pre-emphasis Scheme For Single-ended Center Taped Terminated High Speed Digital Signaling
App 20020186056 - Jong, Jyh-Ming ; et al. | 2002-12-12 |
Source synchronous receiver link initialization and input floating control by clock detection and DLL lock detection
App 20020154718 - Fong, Wai ; et al. | 2002-10-24 |
Method and apparatus for detecting valid clock signals at a clock receiver circuit
App 20020078392 - Jong, Jyh-Ming ; et al. | 2002-06-20 |
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