Jones; Gerald W.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Jones; Gerald W..The latest application filed is for "integrated circuit structure".
- Jones; Gerald W. - Apalachin NY
- Jones; Gerald W. - Johnson City NY
| Patent | Date |
|---|---|
| Integrated circuit structure Grant 6,887,779 - Alcoe , et al. May 3, 2 | 2005-05-03 |
| Method of making a multi-layered interconnect structure Grant 6,829,823 - Downes, Jr. , et al. December 14, 2 | 2004-12-14 |
| Integrated circuit structure App 20040099939 - Alcoe, David J. ; et al. | 2004-05-27 |
| Integrated circuit structure Grant 6,720,502 - Alcoe , et al. April 13, 2 | 2004-04-13 |
| Printed wiring board structure with z-axis interconnections Grant 6,593,534 - Jones , et al. July 15, 2 | 2003-07-15 |
| Printed wiring board structure with z-axis interconnections App 20020131229 - Jones, Gerald W. ; et al. | 2002-09-19 |
| Electronic package with high density interconnect layer App 20020085364 - Downes, Francis J. JR. ; et al. | 2002-07-04 |
| Electronic package with high density interconnect layer Grant 6,373,717 - Downes, Jr. , et al. April 16, 2 | 2002-04-16 |
| Method and structure for preventing adhesive bleed onto surfaces App 20010028117 - Appelt, Bernd K. ; et al. | 2001-10-11 |
| Method of uniformly depositing seed and a conductor and the resultant printed circuit structure Grant 6,136,513 - Angelopoulos , et al. October 24, 2 | 2000-10-24 |
| Method of making circuitized substrate Grant 5,599,747 - Bhatt , et al. February 4, 1 | 1997-02-04 |
| Photoresist develop and strip solvent compositions and method for their use Grant 5,268,260 - Bantu , et al. December 7, 1 | 1993-12-07 |
| Method for visual inspection of multilayer printed circuit boards Grant 4,697,923 - Jones , et al. October 6, 1 | 1987-10-06 |
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