Jones; Erin Catherine
Patent Applications and Registrations
Patent applications and USPTO patent grants for Jones; Erin Catherine.The latest application filed is for "self-aligned planar double-gate transistor structure".
- Jones; Erin Catherine - Corvallis OR
- Jones, Erin Catherine - Tuckahoe NY
- Jones; Erin Catherine - Yorktown Heights NY
| Patent | Date |
|---|---|
| Self-aligned planar double-gate transistor structure Grant 7,960,790 - Dokumaci , et al. June 14, 2 | 2011-06-14 |
| Self-aligned planar double-gate transistor structure Grant 7,453,123 - Dokumaci , et al. November 18, 2 | 2008-11-18 |
| Self-aligned Planar Double-gate Transistor Structure App 20080246090 - Dokumaci; Omer H. ; et al. | 2008-10-09 |
| Self-aligned Planar Double-gate Process By Self-aligned Oxidation App 20070138556 - Dokumaci; Omer H. ; et al. | 2007-06-21 |
| Self-aligned planar double-gate process by self-aligned oxidation Grant 7,205,185 - Dokumaci , et al. April 17, 2 | 2007-04-17 |
| Self-aligned planar double-gate process by self-aligned oxidation App 20050059252 - Dokumaci, Omer H. ; et al. | 2005-03-17 |
| Method of forming variable oxide thicknesses across semiconductor chips App 20020197836 - Iyer, S. Sundar Kumar ; et al. | 2002-12-26 |
| Back-plane for semiconductor device Grant 6,281,551 - Chan , et al. August 28, 2 | 2001-08-28 |
| Method for making bonded metal back-plane substrates Grant 6,057,212 - Chan , et al. May 2, 2 | 2000-05-02 |
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