loadpatents
Patent applications and USPTO patent grants for Jones; Andrew Michael.The latest application filed is for "package".
Patent | Date |
---|---|
Integrated circuit package with multiple dies and queue allocation Grant 9,367,517 - Jones , et al. June 14, 2 | 2016-06-14 |
Cache memory system Grant 9,311,246 - Jones , et al. April 12, 2 | 2016-04-12 |
Cache pre-fetching responsive to data availability Grant 9,208,096 - Jones , et al. December 8, 2 | 2015-12-08 |
Integrated circuit package with multiple dies and a multiplexed communications interface Grant 9,105,316 - Jones , et al. August 11, 2 | 2015-08-11 |
Circuit Grant 9,086,870 - Ryan , et al. July 21, 2 | 2015-07-21 |
Cache arrangement Grant 9,058,283 - Ryan , et al. June 16, 2 | 2015-06-16 |
IC with boot transaction translation and related methods Grant 9,026,774 - Jones , et al. May 5, 2 | 2015-05-05 |
Cache memory controller Grant 8,996,815 - Jones , et al. March 31, 2 | 2015-03-31 |
Integrated circuit system providing enhanced communications between integrated circuit dies and related methods Grant 8,990,540 - Jones , et al. March 24, 2 | 2015-03-24 |
Arrangement Grant 8,930,637 - Jones , et al. January 6, 2 | 2015-01-06 |
Cache memory system including selectively accessible pre-fetch memory for pre-fetch of variable size data Grant 8,725,987 - Jones , et al. May 13, 2 | 2014-05-13 |
Package App 20140098617 - Jones; Andrew Michael ;   et al. | 2014-04-10 |
Integrated circuit package with multiple dies and bundling of control signals Grant 8,653,638 - Jones , et al. February 18, 2 | 2014-02-18 |
Integrated circuit package with multiple dies and a multiplexed communications interface Grant 8,629,544 - Jones , et al. January 14, 2 | 2014-01-14 |
Integrated circuit package with multiple dies and sampled control signals Grant 8,610,258 - Jones , et al. December 17, 2 | 2013-12-17 |
Method and apparatus for interfacing multiple dies with mapping to modify source identity Grant 8,521,937 - Urzi , et al. August 27, 2 | 2013-08-27 |
Integrated circuit package with multiple dies and interrupt processing Grant 8,504,751 - Jones , et al. August 6, 2 | 2013-08-06 |
Integrated circuit package with multiple dies and a synchronizer Grant 8,468,381 - Jones , et al. June 18, 2 | 2013-06-18 |
Arrangement App 20130103912 - Jones; Andrew Michael ;   et al. | 2013-04-25 |
Circuit App 20130064143 - Ryan; Stuart ;   et al. | 2013-03-14 |
Arrangement And Method App 20130031347 - Jones; Andrew Michael ;   et al. | 2013-01-31 |
Arrangement And Method App 20130031330 - Jones; Andrew Michael ;   et al. | 2013-01-31 |
Cache Arrangement App 20130031313 - Ryan; Stuart ;   et al. | 2013-01-31 |
Cache Memory Controller App 20130031312 - Jones; Andrew Michael ;   et al. | 2013-01-31 |
Method and apparatus for interfacing multiple dies with mapping for source identifier allocation Grant 8,347,258 - Urzi , et al. January 1, 2 | 2013-01-01 |
Method And Apparatus For Interfacing Multiple Dies With Mapping To Modify Source Identity App 20120210093 - URZI; Ignazio Antonino ;   et al. | 2012-08-16 |
Method And Apparatus For Interfacing Multiple Dies With Mapping For Source Identifier Allocation App 20120210288 - URZI; Ignazio Antonino ;   et al. | 2012-08-16 |
Multiple purpose integrated circuit Grant 8,060,732 - Jones , et al. November 15, 2 | 2011-11-15 |
Multiple purpose integrated circuit Grant 8,051,237 - Ryan , et al. November 1, 2 | 2011-11-01 |
Integrated Circuit Package With Multiple Dies And Bundling Of Control Signals App 20110261603 - Jones; Andrew Michael ;   et al. | 2011-10-27 |
Integrated Circuit Package With Multiple Dies And A Multiplexed Communications Interface App 20110134705 - Jones; Andrew Michael ;   et al. | 2011-06-09 |
Integrated Circuit Package With Multiple Dies And Interrupt Processing App 20110138093 - Jones; Andrew Michael ;   et al. | 2011-06-09 |
Integrated Circuit Package With Multiple Dies And A Synchronizer App 20110135046 - Jones; Andrew Michael ;   et al. | 2011-06-09 |
Integrated Circuit Package With Multiple Dies And Queue Allocation App 20110133826 - Jones; Andrew Michael ;   et al. | 2011-06-09 |
Integrated Circuit Package With Multiple Dies And Sampled Control Signals App 20110133825 - Jones; Andrew Michael ;   et al. | 2011-06-09 |
Circuit security Grant 7,860,252 - Ryan , et al. December 28, 2 | 2010-12-28 |
Cache memory system App 20090307433 - Jones; Andrew Michael ;   et al. | 2009-12-10 |
Cache memory system App 20090132750 - Jones; Andrew Michael ;   et al. | 2009-05-21 |
Cache memory system App 20090132749 - Jones; Andrew Michael ;   et al. | 2009-05-21 |
Cache memory system App 20090132768 - Jones; Andrew Michael ;   et al. | 2009-05-21 |
Circuit Security App 20080170694 - Ryan; Stuart Andrew ;   et al. | 2008-07-17 |
Multiple purpose integrated circuit App 20070283140 - Jones; Andrew Michael ;   et al. | 2007-12-06 |
Multiple Purpose Integrated Circuit App 20070262653 - Ryan; Stuart Andrew ;   et al. | 2007-11-15 |
Processing system Grant 7,047,245 - Jones May 16, 2 | 2006-05-16 |
Microcomputer chips with interconnected address and data paths Grant 6,757,759 - Jones , et al. June 29, 2 | 2004-06-29 |
System and method for communicating information to and from a single chip computer system through an external communication port with translation circuitry Grant 6,697,931 - Jones , et al. February 24, 2 | 2004-02-24 |
Interrupt and control packets for a microcomputer Grant 6,658,514 - Jones , et al. December 2, 2 | 2003-12-02 |
Microcomputer with interrupt packets Grant 6,549,965 - Jones , et al. April 15, 2 | 2003-04-15 |
Processing system App 20030061224 - Jones, Andrew Michael | 2003-03-27 |
Adapter for a microprocessor Grant 6,526,501 - Edwards , et al. February 25, 2 | 2003-02-25 |
Adapter For A Microprocessor App 20020188822 - EDWARDS, DAVID ALAN ;   et al. | 2002-12-12 |
Method and system for transmitting interrupts from a peripheral device to another device in a computer system Grant 6,460,105 - Jones , et al. October 1, 2 | 2002-10-01 |
System and method for on-chip communication Grant 6,415,344 - Jones , et al. July 2, 2 | 2002-07-02 |
Microcomputer with packet translation for event packets and memory access packets Grant 6,397,325 - Jones , et al. May 28, 2 | 2002-05-28 |
Microprocessor having an on-chip CPU fetching a debugging routine from a memory in an external debugging device in response to a control signal received through a debugging port Grant 6,356,960 - Jones , et al. March 12, 2 | 2002-03-12 |
Cache coherency mechanism Grant 6,351,790 - Jones February 26, 2 | 2002-02-26 |
Shared memory bus arbitration system to improve access speed when accessing the same address set Grant 6,301,642 - Jones , et al. October 9, 2 | 2001-10-09 |
System and method for booting a computer Grant 6,301,657 - Jones , et al. October 9, 2 | 2001-10-09 |
Cyclic redundancy check in a computer system Grant 6,240,540 - Jones , et al. May 29, 2 | 2001-05-29 |
Method for operation of a bus system for highly flexible and quick data transmission between units connected to the bus system and configuration for carrying out the method Grant 5,828,852 - Niedermeier , et al. October 27, 1 | 1998-10-27 |
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