Johnson; Ryan C.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Johnson; Ryan C..The latest application filed is for "interconnect structures for assembly of multi-layer semiconductor devices".
- Johnson; Ryan C. - Woburn MA
- Johnson; Ryan C. - Waconia MN
| Patent | Date |
|---|---|
| Multi-layer semiconductor devices fabricated using a combination of substrate and via structures and fabrication techniques Grant 9,881,904 - Das , et al. January 30, 2 | 2018-01-30 |
| Interconnect structures for assembly of multi-layer semiconductor devices Grant 9,812,429 - Das , et al. November 7, 2 | 2017-11-07 |
| Interconnect Structures for Assembly of Multi-Layer Semiconductor Devices App 20170092621 - DAS; Rabindra N. ; et al. | 2017-03-30 |
| Multi-Layer Semiconductor Devices Fabricated Using a Combination of Substrate and Via Structures and Fabrication Techniques App 20170040296 - Das; Rabindra N. ; et al. | 2017-02-09 |
| Silicon object array with unidirectional segmented bus architecture Grant 6,816,562 - Atkinson , et al. November 9, 2 | 2004-11-09 |
| Silicon object array with unidirectional segmented bus architecture App 20040130346 - Atkinson, Kevin E. ; et al. | 2004-07-08 |
| Coding and decoding system and method for high-speed data transmission App 20030152154 - Johnson, Ryan C. | 2003-08-14 |
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