| Patent | Date |
|---|
Embedded time of day receiver for clock transmission
Grant 10,715,307 - Jin | 2020-07-14 |
Digital phase locked loop clock synthesizer with image cancellation
Grant 10,594,300 - Jin | 2020-03-17 |
Digital Phase Locked Loop Clock Synthesizer with Image Cancellation
App 20190123723 - Jin; Qu Gary | 2019-04-25 |
Clock synthesizer with hitless reference switching and frequency stabilization
Grant 10,234,895 - Jin , et al. | 2019-03-19 |
Non-linear oven-controlled crystal oscillator compensation circuit
Grant 10,148,274 - Jin De | 2018-12-04 |
Clock Synthesizer with Hitless Reference Switching and Frequency Stabilization
App 20180329450 - JIN; Qu Gary ; et al. | 2018-11-15 |
Clock synthesizer with integral non-linear interpolation (INL) distortion compensation
Grant 10,128,826 - Jin , et al. November 13, 2 | 2018-11-13 |
Method of speeding up output alignment in a digital phase locked loop
Grant 10,069,503 - Zhang , et al. September 4, 2 | 2018-09-04 |
Clock Synthesizer With Integral Non-linear Interpolation (inl) Distortion Compensation
App 20180205370 - Jin; Qu Gary ; et al. | 2018-07-19 |
Method Of Speeding Up Output Alignment In A Digital Phase Locked Loop
App 20170346494 - Zhang; Changhui Cathy ; et al. | 2017-11-30 |
Precision frequency monitor
Grant 9,813,045 - Jin November 7, 2 | 2017-11-07 |
Hardware delay compensation in digital phase locked loop
Grant 9,667,237 - Jin , et al. May 30, 2 | 2017-05-30 |
Phase locked loop with accurate alignment among output clocks
Grant 9,584,138 - Mitric , et al. February 28, 2 | 2017-02-28 |
Phase Locked Loop with Accurate Alignment among Output Clocks
App 20160301417 - Mitric; Krste ; et al. | 2016-10-13 |
Hardware Delay Compensation in Digital Phase Locked Loop
App 20160294401 - Jin; Qu Gary ; et al. | 2016-10-06 |
Crystal oscillator noise compensation method for a multi-loop PLL
Grant 9,444,474 - Rahbar , et al. September 13, 2 | 2016-09-13 |
Precision Frequency Monitor
App 20160079961 - Jin; Qu Gary | 2016-03-17 |
Crystal Oscillator Noise Compensation Method for a Multi-Loop PLL
App 20150326232 - Rahbar; Kamran ; et al. | 2015-11-12 |
Infinite impulse response filter architecture with idle-tone reduction
Grant 9,058,286 - Jin June 16, 2 | 2015-06-16 |
Digital phase locked loop with reduced convergence time
Grant 8,941,424 - Jin January 27, 2 | 2015-01-27 |
Digital Phase Locked Loop With Reduced Convergence Time
App 20150002198 - Jin; Qu Gary | 2015-01-01 |
Zoom motor noise reduction for camera audio recording
Grant 8,750,532 - Jin June 10, 2 | 2014-06-10 |
Infinite Impulse Response Filter Architecture With Idle-tone Reduction
App 20130191429 - Jin; Qu Gary | 2013-07-25 |
Feedforward synchronization in asynchronous packet networks
Grant 8,396,085 - Jin March 12, 2 | 2013-03-12 |
Zoom Motor Noise Reduction for Camera Audio Recording
App 20110305348 - Jin; Qu Gary | 2011-12-15 |
Feedforward Synchronization in Asynchronous Packet Networks
App 20110200060 - Jin; Qu Gary | 2011-08-18 |
Soft reference switch for phase locked loop
Grant 7,965,115 - Jin June 21, 2 | 2011-06-21 |
Soft Reference Switch For Phase Locked Loop
App 20100134159 - Jin; Qu Gary | 2010-06-03 |
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