loadpatents
name:-0.040053844451904
name:-0.026978015899658
name:-0.0005340576171875
Jin; Beom-jun Patent Filings

Jin; Beom-jun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jin; Beom-jun.The latest application filed is for "circuit board having bypass pad".

Company Profile
0.24.27
  • Jin; Beom-jun - Seoul KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Circuit board having bypass pad
Grant 9,627,360 - Han , et al. April 18, 2
2017-04-18
Circuit Board Having Bypass Pad
App 20170018535 - Han; Sang-Guk ;   et al.
2017-01-19
Circuit board having bypass pad
Grant 9,449,716 - Han , et al. September 20, 2
2016-09-20
Methods of forming non-volatile memory devices including vertical NAND strings
Grant 9,373,633 - Jin , et al. June 21, 2
2016-06-21
Circuit board having bypass pad
Grant 9,171,644 - Han , et al. October 27, 2
2015-10-27
Circuit Board Having Bypass Pad
App 20150257255 - Han; Sang-Guk ;   et al.
2015-09-10
Circuit Board Having Bypass Pad
App 20150243371 - Han; Sang-Guk ;   et al.
2015-08-27
Circuit board having bypass pad
Grant 9,069,036 - Han , et al. June 30, 2
2015-06-30
Methods of Forming Non-Volatile Memory Devices Including Vertical NAND Strings
App 20150140813 - Jin; Beom-jun ;   et al.
2015-05-21
Methods of forming non-volatile memory devices including vertical NAND strings
Grant 8,971,118 - Jin , et al. March 3, 2
2015-03-03
Circuit board having bypass pad
Grant 8,917,107 - Han , et al. December 23, 2
2014-12-23
Non-volatile Memory Devices Including Vertical Nand Strings And Methods Of Forming The Same
App 20140141610 - Jin; Beom-jun ;   et al.
2014-05-22
Non-volatile memory devices including vertical NAND strings and methods of forming the same
Grant 8,659,946 - Jin , et al. February 25, 2
2014-02-25
Non-volatile Memory Devices Including Vertical Nand Strings And Methods Of Forming The Same
App 20130095653 - Jin; Beom-jun ;   et al.
2013-04-18
Non-volatile memory devices including vertical NAND strings and methods of forming the same
Grant 8,325,527 - Jin , et al. December 4, 2
2012-12-04
Non-volatile semiconductor memory device and method of manufacturing the same
Grant 7,785,964 - Park , et al. August 31, 2
2010-08-31
Non-volatile Memory Devices Including Vertical Nand Strings And Methods Of Forming The Same
App 20090310415 - Jin; Beom-jun ;   et al.
2009-12-17
Non-volatile semiconductor memory device and method of manufacturing the same
App 20090008699 - Park; Jin-Jun ;   et al.
2009-01-08
Methods of forming different gate structures in NMOS and PMOS regions and gate structures so formed
Grant 7,399,670 - Jeon , et al. July 15, 2
2008-07-15
Semiconductor device test patterns and related methods for precisely measuring leakage currents in semiconductor cell transistors
Grant 7,271,408 - Kim , et al. September 18, 2
2007-09-18
Gate electrode, method of forming the same, transistor having the gate electrode, method of manufacturing the same, semiconductor device having the gate electrode and method of manufacturing the same
App 20070063295 - Jeon; In-Sang ;   et al.
2007-03-22
MOS semiconductor devices having polysilicon gate electrodes and high dielectric constant gate dielectric layers and methods of manufacturing such devices
App 20070032008 - Kim; Hye-Min ;   et al.
2007-02-08
Methods of forming capacitors of semiconductor devices including silicon-germanium and metallic electrodes
Grant 7,153,750 - Chung , et al. December 26, 2
2006-12-26
Semiconductor device having a barrier layer and method of manufacturing the same
App 20060151826 - Jin; Beom-Jun ;   et al.
2006-07-13
Semiconductor device having transistor and method of manufacturing the same
Grant 7,060,575 - Jin , et al. June 13, 2
2006-06-13
Methods of manufacturing integrated circuit devices having reduced contact resistance between a substrate and a contact pad while maintaining separation of the substrate and the contact pad and integrated circuit devices formed thereby
Grant 7,009,257 - Kim , et al. March 7, 2
2006-03-07
Methods of forming different gate structures in NMOS and PMOS regions and gate structures so formed
App 20060030097 - Jeon; Taek-Soo ;   et al.
2006-02-09
Methods of forming a thin layer including hafnium silicon oxide using atomic layer deposition and methods of forming a gate structure and a capacitor including the same
App 20060019501 - Jin; Beom-Jun ;   et al.
2006-01-26
Methods of forming a thin film structure, and a gate structure and a capacitor including the thin film structure
App 20060013946 - Park; Hong-Bae ;   et al.
2006-01-19
Semiconductor memory device having multi-layered storage node contact plug and method for fabricating the same
Grant 6,984,568 - Jin , et al. January 10, 2
2006-01-10
Methods of manufacturing integrated circuit devices having contact holes using multiple insulating layers
Grant 6,897,109 - Jin , et al. May 24, 2
2005-05-24
Capacitors of semiconductor devices including silicon-germanium and metallic electrodes and methods of fabricating the same
App 20040259308 - Chung, Eun-ae ;   et al.
2004-12-23
Methods of forming contact holes using multiple insulating layers
Grant 6,818,551 - Jin , et al. November 16, 2
2004-11-16
Methods of manufacturing integrated circuit devices having contact holes using multiple insulating layers
App 20040224454 - Jin, Beom-Jun ;   et al.
2004-11-11
Semiconductor device test patterns and related methods for precisely measuring leakage currents in semiconductor cell transistors
App 20040188745 - Kim, Young-pil ;   et al.
2004-09-30
Methods of manufacturing integrated circuit devices having reduced contact resistance between a substrate and a contact pad while maintaining separation of the substrate and the contact pad and integrated circuit devices formed thereby
App 20040129981 - Kim, Young-Pil ;   et al.
2004-07-08
Integrated circuit devices including low dielectric side wall spacers and methods of forming same
App 20040099957 - Jin, Beom-jun
2004-05-27
Semiconductor memory device having multi-layered storage node contact plug and method for fabricating the same
App 20040061162 - Jin, Beom-Jun ;   et al.
2004-04-01
Methods of manufacturing integrated circuit devices having reduced contact resistance between a substrate and a contact pad while maintaining separation of the substrate and the contact pad
Grant 6,689,654 - Kim , et al. February 10, 2
2004-02-10
Semiconductor memory device having multilayered storage node contact plug and method for fabricating the same
Grant 6,664,585 - Jin , et al. December 16, 2
2003-12-16
Semiconductor device having transistor and method of manufacturing the same
App 20030197229 - Jin, Beom-jun ;   et al.
2003-10-23
Semiconductor device having transistor
Grant 6,576,963 - Jin , et al. June 10, 2
2003-06-10
Methods of forming contact holes using multiple insulating layers and integrated circuit devices having the same
App 20030048679 - Jin, Beom-Jun ;   et al.
2003-03-13
Semiconductor Device Having Transistor
App 20020175385 - Jin, Beom-Jun ;   et al.
2002-11-28
Semiconductor memory device having multilayered storage node contact plug and method for fabricating the same
App 20020093035 - Jin, Beom-jun ;   et al.
2002-07-18
Methods of manufacturing integrated circuit devices having reduced contact resistance between a substrate and a contact pad while maintaining separation of the substrate and the contact pad and integrated circuit devices formed thereby
App 20020090786 - Kim, Young-Pil ;   et al.
2002-07-11

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