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Patent applications and USPTO patent grants for Jiang; Yunjian (William).The latest application filed is for "method for automatic clock gating to save power".
Patent | Date |
---|---|
Multi-level clock gating circuitry transformation Grant 8,434,047 - Jiang , et al. April 30, 2 | 2013-04-30 |
Method for multi-cycle path and false path clock gating Grant 7,958,476 - Jiang , et al. June 7, 2 | 2011-06-07 |
Method for automatic clock gating to save power Grant 7,930,673 - Jiang , et al. April 19, 2 | 2011-04-19 |
Method for optimized automatic clock gating Grant 7,882,461 - Jiang , et al. February 1, 2 | 2011-02-01 |
Method For Optimized Automatic Clock Gating App 20080301594 - Jiang; Yunjian (William) ;   et al. | 2008-12-04 |
Method For Automatic Clock Gating To Save Power App 20080301593 - Jiang; Yunjian (William) ;   et al. | 2008-12-04 |
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