loadpatents
Patent applications and USPTO patent grants for Jhan; Yi-Ruei.The latest application filed is for "method for forming sidewall spacers and semiconductor devices fabricated thereof".
Patent | Date |
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Method For Forming Sidewall Spacers And Semiconductor Devices Fabricated Thereof App 20220293769 - Pan; Kuan-Ting ;   et al. | 2022-09-15 |
Multi-gate Device And Related Methods App 20220270934 - PAN; Kuan-Ting ;   et al. | 2022-08-25 |
Multi-gate device and related methods Grant 11,328,963 - Pan , et al. May 10, 2 | 2022-05-10 |
Semiconductor Fabrication System Embedded with Effective Baking Module App 20220130693 - Lin; Han-Yu ;   et al. | 2022-04-28 |
Semiconductor Device Structure And Methods Of Forming The Same App 20220093595 - PAN; Kuan-Ting ;   et al. | 2022-03-24 |
Semiconductor Devices With Fin-top Hard Mask And Methods For Fabrication Thereof App 20220059678 - JHAN; Yi-Ruei ;   et al. | 2022-02-24 |
Semiconductor fabrication system embedded with effective baking module Grant 11,222,794 - Lin , et al. January 11, 2 | 2022-01-11 |
Finfet Pitch Scaling App 20210375860 - Pan; Kuan-Ting ;   et al. | 2021-12-02 |
Method for FinFET Fabrication and Structure Thereof App 20210327764 - Lin; Han-Yu ;   et al. | 2021-10-21 |
Multi-gate Device And Related Methods App 20210272856 - PAN; Kuan-Ting ;   et al. | 2021-09-02 |
Gate Isolation Feature and Manufacturing Method Thereof App 20210273075 - Pan; Kuan-Ting ;   et al. | 2021-09-02 |
Multi-Gate Device and Method of Fabrication Thereof App 20210257480 - Jhan; Yi-Ruei ;   et al. | 2021-08-19 |
Method for FinFET fabrication and structure thereof Grant 11,056,393 - Lin , et al. July 6, 2 | 2021-07-06 |
Methods of Reducing Gate Spacer Loss During Semiconductor Manufacturing App 20210202247 - Jhan; Yi-Ruei ;   et al. | 2021-07-01 |
Semiconductor Device And Method Of Manufacturing The Same App 20210134677 - Pan; Kuan-Ting ;   et al. | 2021-05-06 |
Methods of reducing gate spacer loss during semiconductor manufacturing Grant 10,950,434 - Jhan , et al. March 16, 2 | 2021-03-16 |
Method for forming semiconductor device Grant 10,847,633 - Jhan , et al. November 24, 2 | 2020-11-24 |
Method for FinFET Fabrication and Structure Thereof App 20200105604 - Lin; Han-Yu ;   et al. | 2020-04-02 |
Methods of Reducing Gate Spacer Loss During Semiconductor Manufacturing App 20200006062 - Jhan; Yi-Ruei ;   et al. | 2020-01-02 |
Semiconductor Fabrication System Embedded with Effective Baking Module App 20190304812 - Lin; Han-Yu ;   et al. | 2019-10-03 |
Method For Forming Semiconductor Device App 20190165133 - JHAN; Yi-Ruei ;   et al. | 2019-05-30 |
Tunneling transistor with asymmetric gate Grant 9,076,764 - Wu , et al. July 7, 2 | 2015-07-07 |
Tunneling Transistor With Asymmetric Gate App 20150021654 - WU; Yung-Chun ;   et al. | 2015-01-22 |
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