Jeong; Chul Soo
Patent Applications and Registrations
Patent applications and USPTO patent grants for Jeong; Chul Soo.The latest application filed is for "circuit and method for preventing false lock and delay locked loop using the same".
- Jeong; Chul Soo - Daejeon-si N/A KR
| Patent | Date |
|---|---|
| Circuit and method for preventing false lock and delay locked loop using the same Grant 8,698,527 - Moon , et al. April 15, 2 | 2014-04-15 |
| Pre-emphasis circuit and differential current signaling system having the same Grant 8,659,329 - Moon , et al. February 25, 2 | 2014-02-25 |
| Circuit And Method For Preventing False Lock And Delay Locked Loop Using The Same App 20120306551 - MOON; Yong Hwan ; et al. | 2012-12-06 |
| Pre-emphasis Circuit And Differential Current Signaling System Having The Same App 20120194224 - Moon; Yong-Hwan ; et al. | 2012-08-02 |
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