loadpatents
Patent applications and USPTO patent grants for JENG; Pei-Ren.The latest application filed is for "method for manufacturing semiconductor structure with enlarged volumes of source-drain regions".
Patent | Date |
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Method For Manufacturing Semiconductor Structure With Enlarged Volumes Of Source-drain Regions App 20220293773 - YANG; Tsung-Hsi ;   et al. | 2022-09-15 |
Semiconductor device and method Grant 11,437,497 - Tsai , et al. September 6, 2 | 2022-09-06 |
In-Situ Straining Epitaxial Process App 20220238656 - Chen; Hsiu-Ting ;   et al. | 2022-07-28 |
Semiconductor method and device Grant 11,367,660 - Yen , et al. June 21, 2 | 2022-06-21 |
Apparatus For Manufacturing A Thin Film And A Method Therefor App 20220181143 - HSIAO; Tsai-Fu ;   et al. | 2022-06-09 |
Seamless Gap Fill App 20220157934 - Huang; Yen-Chun ;   et al. | 2022-05-19 |
Semiconductor Device and Method for Manufacture App 20220130979 - Chang; Chia-Ao ;   et al. | 2022-04-28 |
In-situ straining epitaxial process Grant 11,302,782 - Chen , et al. April 12, 2 | 2022-04-12 |
Semiconductor Device and Method of Manufacture App 20220059655 - Ting; Heng-Wen ;   et al. | 2022-02-24 |
Apparatus for manufacturing a thin film and a method therefor Grant 11,244,822 - Hsiao , et al. February 8, 2 | 2022-02-08 |
Seamless gap fill Grant 11,239,310 - Huang , et al. February 1, 2 | 2022-02-01 |
Wavy profile mitigation Grant 11,232,988 - Shen , et al. January 25, 2 | 2022-01-25 |
Semiconductor device and method Grant 11,211,470 - Chen , et al. December 28, 2 | 2021-12-28 |
Wavy Profile Mitigation App 20210375688 - Shen; Shu-Wen ;   et al. | 2021-12-02 |
Semiconductor Device and Method App 20210366715 - Ma; Ta-Chun ;   et al. | 2021-11-25 |
Semiconductor device and method of manufacture Grant 11,171,209 - Ting , et al. November 9, 2 | 2021-11-09 |
Self-aligned insulated film for high-K metal gate device Grant 11,094,545 - Ng , et al. August 17, 2 | 2021-08-17 |
Semiconductor device and method Grant 11,087,987 - Ma , et al. August 10, 2 | 2021-08-10 |
Interfacial Layer Between Fin and Source/Drain Region App 20210193831 - Chin; Chih-Yun ;   et al. | 2021-06-24 |
Apparatus and method for spatial atomic layer deposition Grant 11,008,654 - Lin , et al. May 18, 2 | 2021-05-18 |
Semiconductor Device and Method App 20210119013 - Chen; Meng-Ku ;   et al. | 2021-04-22 |
Semiconductor Method and Device App 20210098308 - Yen; Cheng-Hsiung ;   et al. | 2021-04-01 |
Supportive Layer in Source/Drains of FinFET Devices App 20210083052 - Tai; Jung-Chi ;   et al. | 2021-03-18 |
Interfacial layer between fin and source/drain region Grant 10,944,005 - Chin , et al. March 9, 2 | 2021-03-09 |
Semiconductor method and device Grant 10,867,862 - Yen , et al. December 15, 2 | 2020-12-15 |
FinFET with rounded source/drain profile Grant 10,861,975 - Yu , et al. December 8, 2 | 2020-12-08 |
Supportive layer in source/drains of FinFET devices Grant 10,854,715 - Tai , et al. December 1, 2 | 2020-12-01 |
Seamless Gap Fill App 20200295131 - HUANG; Yen-Chun ;   et al. | 2020-09-17 |
In-Situ Straining Epitaxial Process App 20200266274 - Chen; Hsiu-Ting ;   et al. | 2020-08-20 |
Seamless gap fill Grant 10,672,866 - Huang , et al. | 2020-06-02 |
In-situ straining epitaxial process Grant 10,644,116 - Chen , et al. | 2020-05-05 |
Semiconductor Device and Method App 20200135467 - Ma; Ta-Chun ;   et al. | 2020-04-30 |
Semiconductor Device and Method of Manufacture App 20200105876 - Ting; Heng-Wen ;   et al. | 2020-04-02 |
Apparatus and Method for Spatial Atomic Layer Deposition App 20200095682 - Lin; Anthony ;   et al. | 2020-03-26 |
Semiconductor Method and Device App 20200075729 - Yen; Cheng-Hsiung ;   et al. | 2020-03-05 |
Semiconductor Device and Method App 20200006533 - Tsai; Ji-Yin ;   et al. | 2020-01-02 |
Interfacial Layer Between Fin and Source/Drain Region App 20200006548 - Chin; Chih-Yun ;   et al. | 2020-01-02 |
Interfacial Layer Between Fin and Source/Drain Region App 20190378920 - Chin; Chih-Yun ;   et al. | 2019-12-12 |
FinFET with Rounded Source/Drain Profile App 20190371934 - Yu; Ming-Hua ;   et al. | 2019-12-05 |
Apparatus and method for spatial atomic layer deposition Grant 10,494,716 - Lin , et al. De | 2019-12-03 |
Interfacial layer between fin and source/drain region Grant 10,483,396 - Chin , et al. Nov | 2019-11-19 |
Self-Aligned Insulated Film for High-K Metal Gate Device App 20190341263 - Ng; Jin-Aun ;   et al. | 2019-11-07 |
Supportive Layer in Source/Drains of FinFET Devices App 20190319098 - TAI; Roger ;   et al. | 2019-10-17 |
Self-aligned insulated film for high-k metal gate device Grant 10,388,531 - Ng , et al. A | 2019-08-20 |
FinFET with rounded source/drain profile Grant 10,388,792 - Yu , et al. A | 2019-08-20 |
Apparatus and Method for Spatial Atomic Layer Deposition App 20190136378 - Lin; Anthony ;   et al. | 2019-05-09 |
Apparatus and method for spatial atomic layer deposition Grant 10,161,039 - Lin , et al. Dec | 2018-12-25 |
Seamless Gap Fill App 20180350906 - Huang; Yen-Chun ;   et al. | 2018-12-06 |
Seamless gap fill Grant 10,084,040 - Huang , et al. September 25, 2 | 2018-09-25 |
Apparatus and Method for Spatial Atomic Layer Deposition App 20180142351 - Lin; Anthony ;   et al. | 2018-05-24 |
FinFET with Rounded Source/Drain Profile App 20180090608 - Yu; Ming-Hua ;   et al. | 2018-03-29 |
FinFET with bottom SiGe layer in source/drain Grant 9,911,829 - Yu , et al. March 6, 2 | 2018-03-06 |
Apparatus and method for spatial atomic layer deposition Grant 9,873,943 - Lin , et al. January 23, 2 | 2018-01-23 |
Selectively deposited spacer film for metal gate sidewall protection Grant 9,865,709 - Ho , et al. January 9, 2 | 2018-01-09 |
Self aligned contact scheme Grant 9,859,386 - Ho , et al. January 2, 2 | 2018-01-02 |
FinFET with rounded source/drain profile Grant 9,831,345 - Yu , et al. November 28, 2 | 2017-11-28 |
Selectively deposited spacer film for metal gate sidewall protection Grant 9,818,846 - Ho , et al. November 14, 2 | 2017-11-14 |
Selectively Deposited Spacer Film For Metal Gate Sidewall Protection App 20170317192 - HO; Tsai-Jung ;   et al. | 2017-11-02 |
Self Aligned Contact Scheme App 20170288031 - Ho; Tsai-Jung ;   et al. | 2017-10-05 |
Uniform shallow trench isolation regions and the method of forming the same Grant 9,779,980 - Liou , et al. October 3, 2 | 2017-10-03 |
Self-aligned insulated film for high-k metal gate device Grant 9,779,947 - Ng , et al. October 3, 2 | 2017-10-03 |
Apparatus and methods for annealing wafers Grant 9,768,044 - Wang , et al. September 19, 2 | 2017-09-19 |
Selectively Deposited Spacer Film For Metal Gate Sidewall Protection App 20170213901 - HO; Tsai-Jung ;   et al. | 2017-07-27 |
Seamless Gap Fill App 20170194424 - Huang; Yen-Chun ;   et al. | 2017-07-06 |
Apparatus and Method for Spatial Atomic Layer Deposition App 20170167021 - Lin; Anthony ;   et al. | 2017-06-15 |
Dummy FinFET structure and method of making same Grant 9,647,066 - Lu , et al. May 9, 2 | 2017-05-09 |
Apparatus For Manufacturing A Thin Film And A Method Therefor App 20170110312 - HSIAO; Tsai-Fu ;   et al. | 2017-04-20 |
Self aligned contact scheme Grant 9,548,366 - Ho , et al. January 17, 2 | 2017-01-17 |
Apparatus and Methods for Annealing Wafers App 20160240408 - Wang; Yi-Chao ;   et al. | 2016-08-18 |
Self-aligned Insulated Film For High-k Metal Gate Device App 20160196979 - Ng; Jin-Aun ;   et al. | 2016-07-07 |
FinFET with Bottom SiGe Layer in Source/Drain App 20160163836 - Yu; Ming-Hua ;   et al. | 2016-06-09 |
Apparatus and methods for annealing wafers Grant 9,337,059 - Wang , et al. May 10, 2 | 2016-05-10 |
FinFET with bottom SiGe layer in source/drain Grant 9,293,581 - Yu , et al. March 22, 2 | 2016-03-22 |
Uniform Shallow Trench Isolation Regions and the Method of Forming the Same App 20160013095 - Liou; Yu-Ling ;   et al. | 2016-01-14 |
Uniform shallow trench isolation regions and the method of forming the same Grant 9,142,402 - Liou , et al. September 22, 2 | 2015-09-22 |
In-situ Straining Epitaxial Process App 20150221509 - Chen; Hsiu-Ting ;   et al. | 2015-08-06 |
FinFET with Bottom SiGe Layer in Source/Drain App 20150137180 - Yu; Ming-Hua ;   et al. | 2015-05-21 |
FinFET with bottom SiGe layer in source/drain Grant 8,963,258 - Yu , et al. February 24, 2 | 2015-02-24 |
Self-aligned Insulated Film For High-k Metal Gate Device App 20140367802 - Ng; Jin-Aun ;   et al. | 2014-12-18 |
FinFET with Bottom SiGe Layer in Source/Drain App 20140264590 - Yu; Ming-Hua ;   et al. | 2014-09-18 |
FinFET with Rounded Source/Drain Profile App 20140252489 - Yu; Ming-Hua ;   et al. | 2014-09-11 |
Self-aligned insulated film for high-k metal gate device Grant 8,822,283 - Ng , et al. September 2, 2 | 2014-09-02 |
Doping method in 3D semiconductor device Grant 8,796,124 - Jeng August 5, 2 | 2014-08-05 |
Method for fabricating an isolation structure Grant 8,580,653 - Lee , et al. November 12, 2 | 2013-11-12 |
Source/drain doping method in 3D devices Grant 8,574,995 - Jeng November 5, 2 | 2013-11-05 |
Dummy FinFET Structure and Method of Making Same App 20130277760 - Lu; Chang-Shen ;   et al. | 2013-10-24 |
Method For Fabricating An Isolation Structure App 20130171803 - LEE; Tze-Liang ;   et al. | 2013-07-04 |
Uniform Shallow Trench Isolation Regions and the Method of Forming the Same App 20130137251 - Liou; Yu-Ling ;   et al. | 2013-05-30 |
Source/drain Doping Method In 3d Devices App 20130122676 - Jeng; Pei-Ren | 2013-05-16 |
Doping Method In 3d Semiconductor Device App 20130102137 - Jeng; Pei-Ren | 2013-04-25 |
Method for fabricating an isolation structure Grant 8,404,561 - Lee , et al. March 26, 2 | 2013-03-26 |
Self-aligned Insulated Film For High-k Metal Gate Device App 20130056837 - Ng; Jin-Aun ;   et al. | 2013-03-07 |
Apparatus and Methods for Annealing Wafers App 20130052837 - Wang; Yi-Chao ;   et al. | 2013-02-28 |
Shallow trench isolation structure having reduced dislocation density Grant 7,915,173 - Jeng March 29, 2 | 2011-03-29 |
Bottom electrode of metal-insulator-metal capacitor Grant 7,880,213 - Lo , et al. February 1, 2 | 2011-02-01 |
Method For Fabricating An Isolation Structure App 20100291751 - LEE; Tze-Liang ;   et al. | 2010-11-18 |
Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio Grant 7,723,226 - Yu , et al. May 25, 2 | 2010-05-25 |
Self-aligned double layered silicon-metal nanocrystal memory element, method for fabricating the same, and memory having the memory element Grant 7,683,438 - Jeng March 23, 2 | 2010-03-23 |
Interlayer interconnect of three-dimensional memory and method for manufacturing the same Grant 7,446,038 - Jeng November 4, 2 | 2008-11-04 |
Self-aligned Double Layered Silicon-metal Nanocrystal Memory Element, Method For Fabricating The Same, And Memory Having The Memory Element App 20080217683 - Jeng; Pei-Ren | 2008-09-11 |
Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio App 20080171431 - Yu; Chen-Hua ;   et al. | 2008-07-17 |
Method for fabricating self-aligned double layered silicon-metal nanocrystal memory element Grant 7,393,745 - Jeng July 1, 2 | 2008-07-01 |
Interlayer Interconnect Of Three-dimensional Memory And Method For Manufacturing The Same App 20070178693 - Jeng; Pei-Ren | 2007-08-02 |
Bottom Electrode Of Metal-insulator-metal Capacitor And Method Of Fabricating The Same App 20070166911 - Lo; Wen-Miao ;   et al. | 2007-07-19 |
Three-dimensional TFT nanocrystal memory device App 20070161162 - Jeng; Pei-Ren | 2007-07-12 |
Resistance-change nanocrystal memory App 20070145344 - Jeng; Pei-Ren | 2007-06-28 |
Self-aligned Double Layered Silicon-metal Nanocrystal Memory Element, Method For Fabricating The Same, And Memory Having The Memory Element App 20070105307 - Jeng; Pei-Ren | 2007-05-10 |
Nanocrystal memory element, method for fabricating the same and memory having the memory element App 20070105316 - Jeng; Pei-Ren | 2007-05-10 |
Memory device and method for forming a passivation layer thereon Grant 7,157,360 - Chiu , et al. January 2, 2 | 2007-01-02 |
Method of improving flash memory performance Grant 7,151,042 - Jeng , et al. December 19, 2 | 2006-12-19 |
Shallow trench isolation structure having reduced dislocation density App 20060252228 - Jeng; Pei-Ren | 2006-11-09 |
Method of improving flash memory performance App 20060172490 - Jeng; Pei-Ren ;   et al. | 2006-08-03 |
Method for forming shallow trench isolation with control of bird beak Grant 6,984,553 - Jeng January 10, 2 | 2006-01-10 |
Method of forming self-aligned contacts Grant 6,939,768 - Jeng September 6, 2 | 2005-09-06 |
Process for a flash memory with high breakdown resistance between gate and contact Grant 6,908,814 - Jeng , et al. June 21, 2 | 2005-06-21 |
Memory device and method for forming a passivation layer thereon Grant 6,867,466 - Chiu , et al. March 15, 2 | 2005-03-15 |
Method for fabricating flash memory Grant 6,849,504 - Chang , et al. February 1, 2 | 2005-02-01 |
Selfaligned process for a flash memory App 20040266105 - Jeng, Pei-Ren ;   et al. | 2004-12-30 |
Method of forming self-aligned contacts App 20040198006 - Jeng, Pei-Ren | 2004-10-07 |
Method for forming shallow trench isolation with control of bird beak App 20040180550 - Jeng, Pei-Ren | 2004-09-16 |
Method Of Fabricating Flash Memory App 20040166632 - JENG, PEI-REN ;   et al. | 2004-08-26 |
Memory device and method for forming a passivation layer thereon App 20040056360 - Chiu, Hung-Yu ;   et al. | 2004-03-25 |
Method for patterning a dual damascene with retrograde implantation Grant 6,706,611 - Jeng March 16, 2 | 2004-03-16 |
Method for fabricating flash memory App 20040002190 - Chang, Ping-Yi ;   et al. | 2004-01-01 |
Method of improving the interlayer adhesion property of low-k layers in a dual damascene process Grant 6,664,182 - Jeng December 16, 2 | 2003-12-16 |
Method of solving the unlanded phenomenon of the via etch App 20030201121 - Jeng, Pei-Ren | 2003-10-30 |
Memory device and method for forming a passivation layer thereon App 20030173670 - Chiu, Hung-Yu ;   et al. | 2003-09-18 |
Method of forming a spin-on-passivation layer App 20020187653 - Jeng, Pei-Ren | 2002-12-12 |
Method of improving the interlayer adhesion property of low-k layers in a dual damascene process App 20020173158 - Jeng, Pei-Ren | 2002-11-21 |
Method of fabricating a high-coupling ratio flash memory App 20020142542 - Jeng, Pei-Ren | 2002-10-03 |
Method for preventing polysilicon stringer in memory device Grant 6,455,440 - Jeng September 24, 2 | 2002-09-24 |
High density plasma chemical vapor deposition chamber App 20020112666 - Jeng, Pei-Ren | 2002-08-22 |
Method For Fabricating A Dual Damascene Structure App 20020086525 - Jeng, Pei-Ren | 2002-07-04 |
Method for patterning a dual damascene with retrograde implantation App 20020068432 - Jeng, Pei-Ren | 2002-06-06 |
Method for planarizing a flash memory device Grant 6,380,068 - Jeng , et al. April 30, 2 | 2002-04-30 |
Method of fabricating self-aligned multilevel mask ROM Grant 6,326,269 - Jeng , et al. December 4, 2 | 2001-12-04 |
Method for barrier layer in copper manufacture Grant 6,303,490 - Jeng October 16, 2 | 2001-10-16 |
Method for planarizing a flash memory device App 20010012226 - Jeng, Pei-Ren ;   et al. | 2001-08-09 |
Method for improving the electrical property of gate in polycide structure Grant 5,877,074 - Jeng , et al. March 2, 1 | 1999-03-02 |
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