loadpatents
name:-0.0079300403594971
name:-0.0061030387878418
name:-0.0079729557037354
Jen; Michelle Patent Filings

Jen; Michelle

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jen; Michelle.The latest application filed is for "selection of processing mode for receiver circuit".

Company Profile
8.5.8
  • Jen; Michelle - Mountain View CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Selection Of Processing Mode For Receiver Circuit
App 20220308954 - Choudhary; Swadesh ;   et al.
2022-09-29
Enabling Sync Header Suppression Latency Optimization In The Presence Of Retimers For Serial Interconnect
App 20220114128 - Jen; Michelle ;   et al.
2022-04-14
Enabling sync header suppression latency optimization in the presence of retimers for serial interconnect
Grant 11,232,058 - Jen , et al. January 25, 2
2022-01-25
Reduced pin count interface
Grant 11,163,717 - Jen , et al. November 2, 2
2021-11-02
Reduced Pin Count Interface
App 20210056067 - Jen; Michelle ;   et al.
2021-02-25
Low latency retimer
Grant 10,747,688 - Jen , et al. A
2020-08-18
Reduced pin count interface
Grant 10,706,003 - Jen , et al.
2020-07-07
Enabling Sync Header Suppression Latency Optimization In The Presence Of Retimers For Serial Interconnect
App 20190384733 - Jen; Michelle ;   et al.
2019-12-19
Reduced Pin Count Interface
App 20190303338 - Jen; Michelle ;   et al.
2019-10-03
Reduced pin count interface
Grant 10,198,394 - Jen , et al. Fe
2019-02-05
Low Latency Retimer
App 20180181502 - Jen; Michelle ;   et al.
2018-06-28
Reduced Pin Count Interface
App 20170344512 - Jen; Michelle ;   et al.
2017-11-30

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