Jayapalan; Jayakannan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jayapalan; Jayakannan.The latest application filed is for "method and apparatus for estimating resistance and capacitance of metal interconnects".

Company Profile

0.8.3

Jayapalan; Jayakannan - San Diego CA
Jayapalan; Jayakannan - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for estimating resistance and capacitance of metal interconnects Grant 7,973,541 - Jayapalan , et al. July 5, 2	2011-07-05
Circuit simulator parameter extraction using a configurable ring oscillator Grant 7,675,372 - Bang , et al. March 9, 2	2010-03-09
Method And Apparatus For Estimating Resistance And Capacitance Of Metal Interconnects App 20090146681 - Jayapalan; Jayakannan ; et al.	2009-06-11
Circuit Simulator Parameter Extraction Using a Configurable Ring Oscillator App 20080048790 - Bang; David ; et al.	2008-02-28
Method to create an alternate integrated circuit layout view from a two dimensional database Grant 7,281,229 - Jayapalan October 9, 2	2007-10-09
Design and fabrication of inductors on a semiconductor substrate Grant 7,272,884 - Jayapalan , et al. September 25, 2	2007-09-25
Local control of electrical and mechanical properties of copper interconnects to achieve stable and reliable via Grant 7,235,884 - McElheny , et al. June 26, 2	2007-06-26
Desing and fabifcation of inductors on a semiconductor substrate App 20070090914 - Jayapalan; Jayakannan ; et al.	2007-04-26
Design and fabrication of inductors on a semiconductor substrate Grant 7,170,382 - Jayapalan , et al. January 30, 2	2007-01-30
Method and apparatus for monitoring parasitic inductance Grant 7,067,842 - Jayapalan , et al. June 27, 2	2006-06-27
High performance capacitor structure Grant 6,829,127 - Liu , et al. December 7, 2	2004-12-07

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