Jayachandran; Sowmiya

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jayachandran; Sowmiya.The latest application filed is for "techniques for dynamic proximity based on-die termination".

Company Profile

3.12.14

Jayachandran; Sowmiya - Portland OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Apparatuses and methods for exiting low power states in memory devices Grant 11,249,531 - Sundaram , et al. February 15, 2	2022-02-15
Dynamically changing between latency-focused read operation and bandwidth-focused read operation Grant 11,036,412 - Khalili , et al. June 15, 2	2021-06-15
Techniques For Dynamic Proximity Based On-die Termination App 20200133669 - QAWAMI; Shekoufeh ; et al.	2020-04-30
Dynamically Changing Between Latency-focused Read Operation And Bandwidth-focused Read Operation App 20200034061 - KHALILI; Sahar ; et al.	2020-01-30
Apparatuses And Methods For Exiting Low Power States In Memory Devices App 20200019227 - Sundaram; Rajesh ; et al.	2020-01-16
Apparatuses and methods for exiting low power states in memory devices Grant 10,437,307 - Sundaram , et al. O	2019-10-08
Nvram Memory Module With Hard Write Throttle Down App 20190278503 - JAYACHANDRAN; Sowmiya ; et al.	2019-09-12
Managing disturbance induced errors Grant 10,153,015 - Damle , et al. Dec	2018-12-11
Techniques for entry to a lower power state for a memory device Grant 9,916,104 - Jayachandran , et al. March 13, 2	2018-03-13
Managing Disturbance Induced Errors App 20180068695 - DAMLE; Prashant S. ; et al.	2018-03-08
Apparatuses And Methods For Exiting Low Power States In Memory Devices App 20170364135 - Sundaram; Rajesh ; et al.	2017-12-21
Techniques for entry to a lower power state for a memory device Grant 9,818,458 - Jayachandran , et al. November 14, 2	2017-11-14
Managing disturbance induced errors Grant 9,792,963 - Damle , et al. October 17, 2	2017-10-17
Apparatuses and methods for exiting low power states in memory devices Grant 9,778,723 - Sundaram , et al. October 3, 2	2017-10-03
Apparatuses And Methods For Exiting Low Power States In Memory Devices App 20170185136 - Sundaram; Rajesh ; et al.	2017-06-29
Techniques For Entry To A Lower Power State For A Memory Device App 20170115916 - Jayachandran; Sowmiya ; et al.	2017-04-27
Mechanism for facilitating power and performance management of non-volatile memory in computing devices Grant 9,417,684 - Ramage , et al. August 16, 2	2016-08-16
Managing Disturbance Induced Errors App 20160189757 - DAMLE; PRASHANT S. ; et al.	2016-06-30
Managing disturbance induced errors Grant 9,202,547 - Damle , et al. December 1, 2	2015-12-01
Managing Disturbance Induced Errors App 20140281203 - DAMLE; PRASHANT S. ; et al.	2014-09-18
ECC functional block placement in a multi-channel mass storage device Grant 8,001,444 - Vogan , et al. August 16, 2	2011-08-16
Command Completion Detection In A Mass Storage Device App 20090172213 - Jayachandran; Sowmiya ; et al.	2009-07-02
Ecc Functional Block Placement In A Multi-channel Mass Storage Device App 20090044078 - Vogan; Andrew ; et al.	2009-02-12

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