Jang; Hyun-Soon

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jang; Hyun-Soon.The latest application filed is for "method of testing a semiconductor memory device".

Company Profile

0.31.19

Jang; Hyun-Soon - Seoul N/A KR
Jang; Hyun-Soon - Boolkwang-dong Eunpyeong-gu KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of testing a semiconductor memory device Grant 8,902,673 - Kim , et al. December 2, 2	2014-12-02
Semiconductor device having a plurality of pads Grant 8,786,303 - Kim , et al. July 22, 2	2014-07-22
Method Of Testing A Semiconductor Memory Device App 20120257461 - KIM; Hong-Beom ; et al.	2012-10-11
Parallel bit test apparatus and parallel bit test method capable of reducing test time Grant 7,941,714 - Cho , et al. May 10, 2	2011-05-10
Semiconductor Device Having A Plurality Of Pads App 20110043235 - Kim; Kab Yong ; et al.	2011-02-24
Multi-chip package for reducing parasitic load of pin Grant 7,868,438 - So , et al. January 11, 2	2011-01-11
Semiconductor memory device including post package repair control circuit and post package repair method Grant 7,746,712 - Kang , et al. June 29, 2	2010-06-29
Memory using packet controller and memory Grant 7,657,713 - Park , et al. February 2, 2	2010-02-02
Multi-chip package for reducing parasitic load of pin Grant 7,566,958 - So , et al. July 28, 2	2009-07-28
Multi-chip Package For Reducing Parasitic Load Of Pin App 20090079496 - SO; Byung-Se ; et al.	2009-03-26
Semiconductor memory device and test system of a semiconductor memory device App 20090044063 - Cho; Yong-Hwan ; et al.	2009-02-12
Semiconductor memory device including post package repair control circuit and post package repair method App 20080247243 - Kang; Jae-sung ; et al.	2008-10-09
Parallel bit test apparatus and parallel bit test method capable of reducing test time App 20080168316 - Cho; Yong-hwan ; et al.	2008-07-10
Layout structure of fuse bank of semiconductor memory device Grant 7,262,479 - Seo , et al. August 28, 2	2007-08-28
Multi-chip package for reducing parasitic load of pin App 20070040280 - So; Byung-Se ; et al.	2007-02-22
Multi-chip package for reducing parasitic load of pin Grant 7,148,563 - So , et al. December 12, 2	2006-12-12
System and method for performing partial array self-refresh operation in a semiconductor memory device Grant 6,992,943 - Hwang , et al. January 31, 2	2006-01-31
Semiconductor device comprising frequency multiplier of external clock and output buffer of test data and semiconductor test method Grant 6,980,036 - Kwon , et al. December 27, 2	2005-12-27
Memory using packet controller and memory App 20050094631 - Park, Bok-Gue ; et al.	2005-05-05
System and method for performing partial array self-refresh operation in a semiconductor memory device App 20050041506 - Hwang, Hyong-Ryol ; et al.	2005-02-24
Memory system with reduced pin count App 20040252689 - Park, Bok-Gue ; et al.	2004-12-16
System and method for performing partial array self-refresh operation in a semiconductor memory device Grant 6,819,617 - Hwang , et al. November 16, 2	2004-11-16
Multi-chip package for reducing parasitic load of pin App 20040120176 - So, Byung-Se ; et al.	2004-06-24
Semiconductor memory device and voltage generating method thereof Grant 6,751,132 - Jang , et al. June 15, 2	2004-06-15
Frequency multiplier and method of multiplying frequency of external clock signal, data output buffer, and semiconductor device including the frequency multiplier and the data output App 20040061560 - Kwon, Kyoung-Hwan ; et al.	2004-04-01
Layout structure of fuse bank of semiconductor memory device App 20040042299 - Seo, Eun-Sung ; et al.	2004-03-04
System and method for performing partial array self-refresh operation in a semiconductor memory device App 20030206427 - Hwang, Hyong-Ryol ; et al.	2003-11-06
System and method for performing partial array self-refresh operation in a semiconductor memory device Grant 6,590,822 - Hwang , et al. July 8, 2	2003-07-08
Power down voltage control method and apparatus Grant 6,560,158 - Choi , et al. May 6, 2	2003-05-06
System and method for performing partial array self-refresh operation in a semiconductor memory device App 20020191466 - Hwang, Hyong-Ryol ; et al.	2002-12-19
Sense amplifier of semiconductor integrated circuit Grant 6,476,646 - Sim , et al. November 5, 2	2002-11-05
Power down voltage control method and apparatus App 20020158275 - Choi, Jong-hyun ; et al.	2002-10-31
Power down voltage control method and apparatus App 20020159322 - Choi, Jong-Hyun ; et al.	2002-10-31
Semiconductor memory device and voltage generating method thereof App 20020141248 - Jang, Hyun-Soon ; et al.	2002-10-03
Multi-bank dynamic random access memory devices having all bank precharge capability Grant 6,343,036 - Park , et al. January 29, 2	2002-01-29
Sense amplifier of semiconductor integrated circuit App 20020008550 - Sim, Jae-Yoon ; et al.	2002-01-24
Integrated circuit memory devices having reduced power consumption requirements during standby mode operation Grant 6,058,063 - Jang May 2, 2	2000-05-02
Pad signal detecting circuit in a semiconductor device for detecting a reference voltage in a high-speed interface Grant 5,999,021 - Jang December 7, 1	1999-12-07
Circuit in a semiconductor memory for programming operation modes of the memory Grant 5,838,990 - Park , et al. November 17, 1	1998-11-17
Synchronous dram having a plurality of latency modes Grant 5,835,956 - Park , et al. November 10, 1	1998-11-10
Semiconductor memory device Grant 5,771,200 - Cho , et al. June 23, 1	1998-06-23
Semiconductor memory Grant 5,703,828 - Park , et al. December 30, 1	1997-12-30
Bit line sensing circuit of a semiconductor memory device Grant 5,646,899 - Jang , et al. July 8, 1	1997-07-08
System for selecting one of a plurality of memory banks for use in an active cycle and all other banks for an inactive precharge cycle Grant 5,631,871 - Park , et al. May 20, 1	1997-05-20
Semiconductor memory having a plurality of I/O buses Grant 5,590,086 - Park , et al. December 31, 1	1996-12-31
Synchronous semiconductor memory device with a write latency control function Grant 5,568,445 - Park , et al. October 22, 1	1996-10-22
Data output buffer of a semiconducter memory device Grant 5,535,171 - Kim , et al. July 9, 1	1996-07-09
Row redundancy circuit for a semiconductor memory device Grant 5,337,277 - Jang August 9, 1	1994-08-09

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