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Patent applications and USPTO patent grants for Jamison; Stephen G..The latest application filed is for "integrated circuit having critical path voltage scaling and method therefor".
Patent | Date |
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Integrated circuit having critical path voltage scaling and method therefor Grant 8,575,962 - Yang , et al. November 5, 2 | 2013-11-05 |
Reconfigurable engineering change order base cell Grant 8,446,176 - Yang , et al. May 21, 2 | 2013-05-21 |
Integrated Circuit Having Critical Path Voltage Scaling And Method Therefor App 20130049807 - YANG; JIANAN ;   et al. | 2013-02-28 |
Clocked single power supply level shifter Grant 7,777,522 - Yang , et al. August 17, 2 | 2010-08-17 |
Clocked Single Power Supply Level Shifter App 20100026343 - Yang; Jianan ;   et al. | 2010-02-04 |
Two Transistor Tie Circuit With Body Biasing App 20090302885 - YANG; JIANAN ;   et al. | 2009-12-10 |
Segmented bus architecture (SBA) for electrostatic discharge (ESD) protection Grant 6,046,897 - Smith , et al. April 4, 2 | 2000-04-04 |
Semiconductor device having a bond pad Grant 5,814,893 - Hsu , et al. September 29, 1 | 1998-09-29 |
Semiconductor device with ESD protection Grant 5,744,841 - Gilbert , et al. April 28, 1 | 1998-04-28 |
Process for forming a semiconductor device with ESD protection Grant 5,733,794 - Gilbert , et al. March 31, 1 | 1998-03-31 |
Process for forming a semiconductor device having a bond pad Grant 5,661,082 - Hsu , et al. August 26, 1 | 1997-08-26 |
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