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Method and apparatus having a snoop filter decoupled from an associated cache and a buffer for replacement line addresses Grant 9,058,272 - O'Bleness , et al. June 16, 2 | 2015-06-16 |
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Method and apparatus for improving cache efficiency Grant 8,943,273 - Jamil , et al. January 27, 2 | 2015-01-27 |
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Arithmetic logic and shifting device for use in a processor Grant 8,099,448 - Ahmed , et al. January 17, 2 | 2012-01-17 |
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Method and apparatus for optimizing line writes in cache coherent systems Grant 7,757,046 - Jamil , et al. July 13, 2 | 2010-07-13 |
Apparatus and method for power optimized replay via selective recirculation of instructions Grant 7,725,683 - Jamil , et al. May 25, 2 | 2010-05-25 |
Method and apparatus for providing a low power mode for a processor while maintaining snoop throughput Grant 7,694,080 - Merrell , et al. April 6, 2 | 2010-04-06 |
Cache memory to support a processor's power mode of operation Grant 7,685,379 - Edirisooriya , et al. March 23, 2 | 2010-03-23 |
Method and apparatus for implementing heterogeneous interconnects Grant 7,640,387 - Edirisooriya , et al. December 29, 2 | 2009-12-29 |
System and apparatus for early fixed latency subtractive decoding Grant 7,634,603 - Edirisooriya , et al. December 15, 2 | 2009-12-15 |
Low power microprocessor cache memory and method of operation Grant 7,620,778 - Mohammad , et al. November 17, 2 | 2009-11-17 |
Processor and method of grouping and executing dependent instructions in a packet Grant 7,523,295 - Codrescu , et al. April 21, 2 | 2009-04-21 |
Cache memory to support a processor's power mode of operation Grant 7,487,299 - Edirisooriya , et al. February 3, 2 | 2009-02-03 |
Method and apparatus for supporting opportunistic sharing in coherent multiprocessors Grant 7,464,227 - Edirisooriya , et al. December 9, 2 | 2008-12-09 |
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Method and apparatus for preventing and recovering from TLB corruption by soft error Grant 7,415,633 - Jamil , et al. August 19, 2 | 2008-08-19 |
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Cache memory to support a processor's power mode of operation Grant 7,404,043 - Edirisooriya , et al. July 22, 2 | 2008-07-22 |
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Method and apparatus for implementing heterogeneous interconnects Grant 7,353,317 - Edirisooriya , et al. April 1, 2 | 2008-04-01 |
Cache memory to support a processor's power mode of operation Grant 7,290,093 - Edirisooriya , et al. October 30, 2 | 2007-10-30 |
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Method and apparatus for fixed latency subtractive decoding App 20070162672 - Edirisooriya; Samantha J. ;   et al. | 2007-07-12 |
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System and method of controlling multiple program threads within a multithreaded processor App 20070016759 - Codrescu; Lucian ;   et al. | 2007-01-18 |
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Transfer of cache lines on-chip between processing cores in a multi-core system Grant 7,120,755 - Jamil , et al. October 10, 2 | 2006-10-10 |
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Methods and apparatus for cache intervention Grant 7,100,001 - Edirisooriya , et al. August 29, 2 | 2006-08-29 |
Dirty line hint array for cache flushing App 20060143397 - O'Bleness; R. Frank ;   et al. | 2006-06-29 |
Method and apparatus for providing a low power mode for a processor while maintaining snoop throughput App 20060143409 - Merrell; Quinn W. ;   et al. | 2006-06-29 |
Method and apparatus for implementing heterogeneous interconnects App 20060143358 - Edirisooriya; Samantha J. ;   et al. | 2006-06-29 |
Methods and apparatus for cache intervention Grant 7,062,613 - Jamil , et al. June 13, 2 | 2006-06-13 |
On-die mechanism for high-reliability processor Grant 7,055,060 - Nguyen , et al. May 30, 2 | 2006-05-30 |
Techniques for pushing data to a processor cache App 20060112238 - Jamil; Sujat ;   et al. | 2006-05-25 |
Method and apparatus for scalable disambiguated coherence in shared storage hierarchies Grant 7,003,632 - Jamil , et al. February 21, 2 | 2006-02-21 |
Direct processor cache access within a system having a coherent multi-processor protocol App 20060004965 - Tu; Steven J. ;   et al. | 2006-01-05 |
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Methods and apparatus for cache intervention Grant 6,983,348 - Jamil , et al. January 3, 2 | 2006-01-03 |
Pushing of clean data to one or more processors in a system having a coherency protocol App 20050289303 - Jamil, Sujat ;   et al. | 2005-12-29 |
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Cache memory to support a processor's power mode of operation App 20050204195 - Edirisooriya, Samantha J. ;   et al. | 2005-09-15 |
Cache memory to support a processor's power mode of operation App 20050204202 - Edirisooriya, Samantha J. ;   et al. | 2005-09-15 |
Cache memory to support a processor's power mode of operation App 20050193176 - Edirisooriya, Samantha J. ;   et al. | 2005-09-01 |
Methods and apparatus for cache intervention App 20050166020 - Jamil, Sujat ;   et al. | 2005-07-28 |
Methods and apparatus to dispatch interrupts in multi-processor systems App 20050125582 - Tu, Steven J. ;   et al. | 2005-06-09 |
Apparatus and method for power optimized replay App 20050071603 - Jamil, Sujat ;   et al. | 2005-03-31 |
Method and apparatus for preventing and recovering from TLB corruption by soft error App 20040193992 - Jamil, Sujat ;   et al. | 2004-09-30 |
Methods and apparatus for transferring cache block ownership Grant 6,775,748 - Jamil , et al. August 10, 2 | 2004-08-10 |
Methods and apparatus for detecting an address conflict App 20040153611 - Jamil, Sujat ;   et al. | 2004-08-05 |
Cache memory to support a processor's power mode of operation App 20040133746 - Edirisooriya, Samantha J. ;   et al. | 2004-07-08 |
Implementing direct access caches in coherent multiprocessors App 20040128450 - Edirisooriya, Samantha J. ;   et al. | 2004-07-01 |
Power/performance optimized caches using memory write prevention through write snarfing App 20040128451 - Edirisooriya, Samantha J. ;   et al. | 2004-07-01 |
On-die mechanism for high-reliability processor App 20040123201 - Nguyen, Hang T. ;   et al. | 2004-06-24 |
Method and apparatus for cache coherency between heterogeneous agents and limiting data transfers among symmetric processors App 20040111563 - Edirisooriya, Samantha J. ;   et al. | 2004-06-10 |
Method and apparatus for supporting opportunistic sharing in coherent multiprocessors App 20040111566 - Edirisooriya, Samantha J. ;   et al. | 2004-06-10 |
Method and apparatus for preventing and recovering from TLB corruption by soft error Grant 6,718,494 - Jamil , et al. April 6, 2 | 2004-04-06 |
Method and apparatus for optimizing line writes in cache coherent systems App 20040064643 - Jamil, Sujat ;   et al. | 2004-04-01 |
Method and apparatus for fixed latency subtractive decoding App 20040064616 - Edirisooriya, Samantha J. ;   et al. | 2004-04-01 |
Method, system, and apparatus for an efficient cache to support multiple configurations App 20040015669 - Edirisooriya, Samantha J. ;   et al. | 2004-01-22 |
Method and apparatus for scalable disambiguated coherence in shared storage hierarchies App 20030233523 - Jamil, Sujat ;   et al. | 2003-12-18 |
System and method for silent data corruption prevention due to next instruction pointer corruption by soft errors Grant 6,658,621 - Jamil , et al. December 2, 2 | 2003-12-02 |
Method and apparatus for scalable disambiguated coherence in shared storage hierarchies Grant 6,651,145 - Jamil , et al. November 18, 2 | 2003-11-18 |
Conditional read and invalidate for use in coherent multiprocessor systems App 20030195939 - Edirisooriya, Samatha J. ;   et al. | 2003-10-16 |
Methods and apparatus for cache intervention App 20030154352 - Jamil, Sujat ;   et al. | 2003-08-14 |
Methods and apparatus for cache intervention App 20030154350 - Edirisooriya, Samantha J. ;   et al. | 2003-08-14 |
Methods and apparatus for transferring cache block ownership App 20030140200 - Jamil, Sujat ;   et al. | 2003-07-24 |
Transfer of cache lines on-chip between processing cores in a multi-core system App 20030126365 - Jamil, Sujat ;   et al. | 2003-07-03 |
Mechanism handling race conditions in FRC-enabled processors App 20030126142 - Tu, Steven J. ;   et al. | 2003-07-03 |
Validating prediction for branches in a cluster via comparison of predicted and condition selected tentative target addresses and validation of branch conditions Grant 6,304,960 - Yeh , et al. October 16, 2 | 2001-10-16 |
System for processing a cluster of instructions where the instructions are issued to the execution units having a priority order according to a template associated with the cluster of instructions Grant 6,240,510 - Yeh , et al. May 29, 2 | 2001-05-29 |