Jain; Praful

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jain; Praful.The latest application filed is for "power delivery network for active-on-active stacked integrated circuits".

Company Profile

2.13.8

Jain; Praful - San Jose CA
JAIN; Praful - Ghaziabad IN
Jain; Praful - Leuven BE
Jain; Praful - Los Gatos CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Power delivery network for active-on-active stacked integrated circuits Grant 11,270,977 - Jain , et al. March 8, 2	2022-03-08
Forming and/or configuring stacked dies Grant 11,043,480 - Jain , et al. June 22, 2	2021-06-22
Power distribution for active-on-active die stack with reduced resistance Grant 11,041,211 - Jain June 22, 2	2021-06-22
Power Delivery Network For Active-on-active Stacked Integrated Circuits App 20210143127 - JAIN; Praful ; et al.	2021-05-13
Integrated circuits designed for multiple sets of criteria Grant 10,908,598 - Jain February 2, 2	2021-02-02
Power Distribution For Active-on-active Die Stack With Reduced Resistance App 20190259702 - Jain; Praful	2019-08-22
Smart Orthodontic Bracket App 20190167386 - RAGHAVAN; Sreevatsan ; et al.	2019-06-06
Smart Orthodontic Bracket App 20180008378 - RAGHAVAN; SREEVATSAN ; et al.	2018-01-11
Circuit for and method of preventing multi-bit upsets induced by single event transients Grant 9,825,632 - Maillard , et al. November 21, 2	2017-11-21
Interconnect circuits having low threshold voltage P-channel transistors for a programmable integrated circuit Grant 9,628,081 - Jain , et al. April 18, 2	2017-04-18
Selection of logic paths for redundancy Grant 9,484,919 - Jain , et al. November 1, 2	2016-11-01
Circuit design-specific failure in time rate for single event upsets Grant 9,483,599 - Jain , et al. November 1, 2	2016-11-01
Master-slave flip-flops and methods of implementing master-slave flip-flops in an integrated circuit Grant 9,281,807 - Maillard , et al. March 8, 2	2016-03-08
Interconnect Circuits Having Low Threshold Voltage P-channel Transistors For A Programmable Integrated Circuit App 20160049940 - Jain; Praful ; et al.	2016-02-18
Integrated circuit having improved radiation immunity Grant 9,236,353 - Jain , et al. January 12, 2	2016-01-12
Single-event upset mitigation in circuit design for programmable integrated circuits Grant 9,183,338 - Jain , et al. November 10, 2	2015-11-10
Single event upset enhanced architecture Grant 9,054,684 - Sood , et al. June 9, 2	2015-06-09
Reduction of single event upsets within a semiconductor integrated circuit Grant 9,000,529 - Jain , et al. April 7, 2	2015-04-07
Integrated Circuit Having Improved Radiation Immunity App 20140145293 - Jain; Praful ; et al.	2014-05-29

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