Jain; Palkesh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jain; Palkesh.The latest application filed is for "in-field monitoring of on-chip thermal, power distribution network, and power grid reliability".

Company Profile

5.25.32

Jain; Palkesh - Bangalore IN
Jain; Palkesh - Karnataka IN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Configurable redundant systems for safety critical applications Grant 11,424,621 - Jain , et al. August 23, 2	2022-08-23
In-field monitoring of on-chip thermal, power distribution network, and power grid reliability Grant 11,416,049 - Jain , et al. August 16, 2	2022-08-16
In-field Monitoring of On-Chip Thermal, Power Distribution Network, and Power Grid Reliability App 20210294398 - JAIN; Palkesh ; et al.	2021-09-23
Configurable Redundant Systems For Safety Critical Applications App 20210234376 - JAIN; Palkesh ; et al.	2021-07-29
Digital duty-cycle monitoring of a periodic signal Grant 10,901,020 - Jain , et al. January 26, 2	2021-01-26
System and method for context-aware thermal management and workload scheduling in a portable computing device Grant 10,591,965 - Jain , et al.	2020-03-17
Digital Duty-cycle Monitoring Of A Periodic Signal App 20200072885 - JAIN; Palkesh ; et al.	2020-03-05
Diverse Redundant Processing Modules For Error Detection App 20200019477 - JAIN; Palkesh ; et al.	2020-01-16
Error correcting code testing Grant 10,389,379 - Gulati , et al. A	2019-08-20
Integrated device comprising device level cells with variable sizes for heat dissipation around hotspots Grant 10,141,297 - Jain , et al. Nov	2018-11-27
Error Correcting Code Testing App 20180331692 - GULATI; Rahul ; et al.	2018-11-15
Adjust voltage for thermal mitigation Grant 10,103,714 - Jain , et al. October 16, 2	2018-10-16
System and method for false pass detection in lockstep dual core or triple modular redundancy (TMR) systems Grant 10,089,194 - Jain , et al. October 2, 2	2018-10-02
Adjusting source voltage based on stored information Grant 10,042,405 - Jain , et al. August 7, 2	2018-08-07
System And Method For Context-aware Thermal Management And Workload Scheduling In A Portable Computing Device App 20180210522 - JAIN; PALKESH ; et al.	2018-07-26
Circuits and Methods Providing Thread Assignment for a Multi-Core Processor App 20180143862 - Saeidi; Mehdi ; et al.	2018-05-24
Systems and methods for adaptive clock design Grant 9,915,968 - Jain , et al. March 13, 2	2018-03-13
Ultra-fast autonomous clock monitoring circuit for safe and secure automotive applications Grant 9,897,651 - Bansal , et al. February 20, 2	2018-02-20
System And Method For False Pass Detection In Lockstep Dual Core Or Triple Modular Redundancy (tmr) Systems App 20170357557 - Jain; Palkesh ; et al.	2017-12-14
Probabilistic Thermal Hotspot Accommodation App 20170308637 - JAIN; PALKESH ; et al.	2017-10-26
Systems And Methods For Adaptive Clock Design App 20170300080 - JAIN; Palkesh ; et al.	2017-10-19
Adjust Voltage For Thermal Mitigation App 20170257079 - JAIN; Palkesh ; et al.	2017-09-07
Ultra-Fast Autonomous Clock Monitoring Circuit for Safe and Secure Automotive Applications App 20170255223 - Bansal; Virendra ; et al.	2017-09-07
Short-resistant Output Pin Circuitry App 20170222430 - Bansal; Virendra ; et al.	2017-08-03
Cell-level signal electromigration Grant 9,665,680 - Sapatnekar , et al. May 30, 2	2017-05-30
Adjusting Source Voltage Based On Stored Information App 20170115710 - JAIN; Palkesh ; et al.	2017-04-27
Supply voltage tracking clock generator in adaptive clock distribution systems Grant 9,628,089 - Jain , et al. April 18, 2	2017-04-18
Stochastic And Topologically Aware Electromigration Analysis Methodology App 20160116527 - Jain; Palkesh	2016-04-28
Cell-Level Signal Electromigration App 20150347665 - Sapatnekar; Sachin S. ; et al.	2015-12-03
Bias temperature instability-resistant circuits Grant 8,786,307 - Jain July 22, 2	2014-07-22
Electromigration compensation system Grant 8,677,303 - Jain , et al. March 18, 2	2014-03-18
Integrated Circuit Die And Method Of Making App 20140024144 - Jain; Palkesh ; et al.	2014-01-23
Integrated Circuit Die And Method Of Making App 20130161718 - Jain; Palkesh ; et al.	2013-06-27
Bias Temperature Instability-resistant Circuits App 20130002297 - Jain; Palkesh ; et al.	2013-01-03
Bias Temperature Instability-resistant Circuits App 20130002327 - Jain; Palkesh	2013-01-03
Method for designing a semiconductor device based on leakage current estimation Grant 8,296,701 - Jain , et al. October 23, 2	2012-10-23
Coherent Analysis Of Asymmetric Aging And Statistical Process Variation In Electronic Circuits App 20120266123 - JAIN; Palkesh ; et al.	2012-10-18
Fabricating IC with NBTI path delay within timing constraints Grant 8,255,850 - Jain , et al. August 28, 2	2012-08-28
Budgeting electromigration-related reliability among metal paths in the design of a circuit Grant 8,219,953 - Jain , et al. July 10, 2	2012-07-10
Method For Designing A Semiconductor Device Based On Leakage Current Estimation App 20120167031 - Jain; Palkesh ; et al.	2012-06-28
Multi-mode circuit and a method for preventing degradation in the multi-mode circuit Grant 8,013,635 - Jain , et al. September 6, 2	2011-09-06
Multi-mode Circuit And A Method For Preventing Degradation In The Multi-mode Circuit App 20110193588 - JAIN; Palkesh ; et al.	2011-08-11
Electromigration Compensation System App 20110080175 - JAIN; PALKESH ; et al.	2011-04-07
SEU hardening circuit and method Grant 7,791,926 - Jain September 7, 2	2010-09-07
Method and apparatus for determining electro-migration in integrated circuit designs Grant 7,752,582 - Jain , et al. July 6, 2	2010-07-06
Technique for aging induced performance drift compensation in an integrated circuit Grant 7,689,377 - Jain , et al. March 30, 2	2010-03-30
Budgeting Electromigration-Related Reliability Among Metal Paths In The Design Of A Circuit App 20090187869 - Jain; Palkesh ; et al.	2009-07-23
Burn-In Tests To Produce Fabricated Integrated Circuits With Reduced Variations Due To Process Spread App 20090187368 - Jain; Palkesh	2009-07-23
Design Of Integrated Circuits Less Susceptible To Degradations In Transistors Caused Due To Operational Stress App 20090187868 - Jain; Palkesh ; et al.	2009-07-23
Seu Hardening Circuit And Method App 20090135643 - JAIN; PALKESH	2009-05-28
Method And Apparatus For Determining Electro-migration In Integrated Circuit Designs App 20090132972 - JAIN; PALKESH ; et al.	2009-05-21
Technique For Aging Induced Performance Drift Compensation In An Integrated Circuit App 20080116455 - JAIN; PALKESH ; et al.	2008-05-22

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