loadpatents
name:-0.27744507789612
name:-0.26829195022583
name:-0.15188407897949
Jagannathan; Hemanth Patent Filings

Jagannathan; Hemanth

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jagannathan; Hemanth.The latest application filed is for "self-aligned uniform bottom spacers for vtfets".

Company Profile
126.200.200
  • Jagannathan; Hemanth - Niskayuna NY
  • Jagannathan; Hemanth - Albany NY
  • Jagannathan; Hemanth - Guilderland NY
  • Jagannathan; Hemanth - Niksayuna NY
  • Jagannathan; Hemanth - Armonk NY
  • - Guilderland NY US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multi-metal dipole doping to offer multi-threshold voltage pairs without channel doping for highly scaling CMOS device
Grant 11,393,725 - Bao , et al. July 19, 2
2022-07-19
Self-aligned Uniform Bottom Spacers For Vtfets
App 20220149179 - Xie; Ruilong ;   et al.
2022-05-12
Contact source/drain resistance
Grant 11,322,588 - Lie , et al. May 3, 2
2022-05-03
Replacement metal gate process for vertical transport field-effect transistor with self-aligned shared contacts
Grant 11,271,106 - Bao , et al. March 8, 2
2022-03-08
Vertical Field Effect Transistor With Bottom Spacer
App 20220059696 - Waskiewicz; Christopher J. ;   et al.
2022-02-24
Replacement metal gate process for vertical transport field-effect transistors with multiple threshold voltages
Grant 11,257,721 - Bao , et al. February 22, 2
2022-02-22
Approach to control over-etching of bottom spacers in vertical fin field effect transistor devices
Grant 11,251,285 - Bao , et al. February 15, 2
2022-02-15
Self-aligned uniform bottom spacers for VTFETS
Grant 11,251,287 - Xie , et al. February 15, 2
2022-02-15
Local Isolation Of Source/drain For Reducing Parasitic Capacitance In Vertical Field Effect Transistors
App 20220037210 - Xie; Ruilong ;   et al.
2022-02-03
Vertical transport field effect transistor structure with self-aligned top junction through early top source/drain epitaxy
Grant 11,239,360 - Mochizuki , et al. February 1, 2
2022-02-01
Replacement bottom spacer for vertical transport field effect transistors
Grant 11,239,119 - Xie , et al. February 1, 2
2022-02-01
Device with pure silicon oxide layer on silicon-germanium layer
Grant 11,217,450 - Ando , et al. January 4, 2
2022-01-04
Vertical field effect transistor with bottom spacer
Grant 11,217,692 - Waskiewicz , et al. January 4, 2
2022-01-04
Fabrication of field effect transistors with different threshold voltages through modified channel interfaces
Grant 11,211,379 - Ando , et al. December 28, 2
2021-12-28
Liner and cap structures for reducing local interconnect vertical resistance without compromising reliability
Grant 11,205,587 - Fan , et al. December 21, 2
2021-12-21
Multi-metal dipole doping to offer multi-threshold voltage pairs without channel doping for highly scaling CMOS device
Grant 11,195,762 - Bao , et al. December 7, 2
2021-12-07
Fabrication of field effect transistors with different threshold voltages through modified channel interfaces
Grant 11,177,257 - Ando , et al. November 16, 2
2021-11-16
Local isolation of source/drain for reducing parasitic capacitance in vertical field effect transistors
Grant 11,152,265 - Xie , et al. October 19, 2
2021-10-19
Self-aligned Uniform Bottom Spacers For Vtfets
App 20210320186 - Xie; Ruilong ;   et al.
2021-10-14
Gate-last process for vertical transport field-effect transistor
Grant 11,145,555 - Mochizuki , et al. October 12, 2
2021-10-12
Cmos Top Source/drain Region Doping And Epitaxial Growth For A Vertical Field Effect Transistor
App 20210305104 - Wu; Heng ;   et al.
2021-09-30
Surface area enhancement for stacked metal-insulator-metal (MIM) capacitor
Grant 11,121,209 - Ando , et al. September 14, 2
2021-09-14
Oxide isolated fin-type field-effect transistors
Grant 11,094,801 - Bao , et al. August 17, 2
2021-08-17
Low resistance source-drain contacts using high temperature silicides
Grant 11,088,033 - Adusumilli , et al. August 10, 2
2021-08-10
Vertical Field Effect Transistor With Bottom Spacer
App 20210217889 - Waskiewicz; Christopher J. ;   et al.
2021-07-15
Low resistance source-drain contacts using high temperature silicides
Grant 11,062,956 - Adusumilli , et al. July 13, 2
2021-07-13
Vertical Field-effect Transistor Late Gate Recess Process With Improved Inter-layer Dielectric Protection
App 20210151583 - XU; Wenyu ;   et al.
2021-05-20
Contact Source/drain Resistance
App 20210111246 - Lie; Fee Li ;   et al.
2021-04-15
Efficient metal-insulator-metal capacitor
Grant 10,978,550 - Chung , et al. April 13, 2
2021-04-13
Surface area enhancement for stacked metal-insulator-metal (MIM) capacitor
Grant 10,978,551 - Ando , et al. April 13, 2
2021-04-13
Interface charge reduction for SiGe surface
Grant 10,971,626 - Sadana , et al. April 6, 2
2021-04-06
Replacement Bottom Spacer For Vertical Transport Field Effect Transistors
App 20210098597 - Xie; Ruilong ;   et al.
2021-04-01
Vertical field-effect transistor late gate recess process with improved inter-layer dielectric protection
Grant 10,937,890 - Xu , et al. March 2, 2
2021-03-02
Maskless epitaxial growth of phosphorus-doped Si and boron-doped SiGe (Ge) for advanced source/drain contact
Grant 10,930,567 - Lee , et al. February 23, 2
2021-02-23
Complementary metal oxide semiconductor replacement gate high-k metal gate devices with work function adjustments
Grant 10,930,566 - Edge , et al. February 23, 2
2021-02-23
Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor device
Grant 10,916,432 - Ando , et al. February 9, 2
2021-02-09
Local Isolation Of Source/drain For Reducing Parasitic Capacitance In Vertical Field Effect Transistors
App 20210035867 - Xie; Ruilong ;   et al.
2021-02-04
Wrap-around-contact structure for top source/drain in vertical FETS
Grant 10,892,336 - Lee , et al. January 12, 2
2021-01-12
Gate first technique in vertical transport FET using doped silicon gates with silicide
Grant 10,892,339 - Bao , et al. January 12, 2
2021-01-12
Low-resistance Top Contact On Vtfet
App 20210005735 - Waskiewicz; Christopher J. ;   et al.
2021-01-07
Multilayer dielectric for metal-insulator-metal capacitor (MIMCAP) capacitance and leakage improvement
Grant 10,886,362 - Ando , et al. January 5, 2
2021-01-05
Single-fin CMOS transistors with embedded and cladded source/drain structures
Grant 10,832,969 - Miao , et al. November 10, 2
2020-11-10
Fast recrystallization of hafnium or zirconium based oxides in insulator-metal structures
Grant 10,833,150 - Frank , et al. November 10, 2
2020-11-10
Gate stack reliability in vertical transport field effect transistors
Grant 10,833,172 - Lee , et al. November 10, 2
2020-11-10
Reduced static random access memory (SRAM) device foot print through controlled bottom source/drain placement
Grant 10,832,975 - Bao , et al. November 10, 2
2020-11-10
Leakage current reduction in stacked metal-insulator-metal capacitors
Grant 10,833,148 - Ando , et al. November 10, 2
2020-11-10
Low-resistance top contact on VTFET
Grant 10,833,173 - Waskiewicz , et al. November 10, 2
2020-11-10
Vertical transport field-effect transistor including dual layer top spacer
Grant 10,825,916 - Jagannathan , et al. November 3, 2
2020-11-03
Low resistance source-drain contacts using high temperature silicides
Grant 10,825,740 - Adusumilli , et al. November 3, 2
2020-11-03
Vertical Field-effect Transistor Late Gate Recess Process With Improved Inter-layer Dielectric Protection
App 20200321448 - XU; Wenyu ;   et al.
2020-10-08
Dual channel silicon/silicon germanium complementary metal oxide semiconductor performance with interface engineering
Grant 10,790,199 - Bao , et al. September 29, 2
2020-09-29
Gate First Technique In Vertical Transport Fet Using Doped Silicon Gates With Silicide
App 20200295147 - BAO; RUQIANG ;   et al.
2020-09-17
Self-aligned bottom source/drain epitaxial growth in vertical field effect transistors
Grant 10,777,659 - Lee , et al. Sept
2020-09-15
Efficient Metal-insulator-metal Capacitor
App 20200273947 - Chung; Kisup ;   et al.
2020-08-27
Formation of self-aligned bottom spacer for vertical transistors
Grant 10,749,012 - Bao , et al. A
2020-08-18
Encapsulation layer for vertical transport field-effect transistor gate stack
Grant 10,741,663 - Bao , et al. A
2020-08-11
Wrap-around-contact structure for top source/drain in vertical FETs
Grant 10,741,652 - Lee , et al. A
2020-08-11
Stacked MIM capacitors with self-aligned contact to reduce via enclosure
Grant 10,734,475 - Ando , et al.
2020-08-04
Oxide Isolated Fin-type Field-effect Transistors
App 20200243670 - Bao; Ruqiang ;   et al.
2020-07-30
Gate-last process for vertical transport field-effect transistor
Grant 10,714,399 - Mochizuki , et al.
2020-07-14
Gate-last Process For Vertical Transport Field-effect Transistor
App 20200219777 - Mochizuki; Shogo ;   et al.
2020-07-09
Replacement Metal Gate Process For Vertical Transport Field-effect Transistor With Self-aligned Shared Contacts
App 20200212220 - Bao; Ruqiang ;   et al.
2020-07-02
Replacement Metal Gate Process For Vertical Transport Field-effect Transistors With Multiple Threshold Voltages
App 20200211908 - Bao; Ruqiang ;   et al.
2020-07-02
Low resistance source-drain contacts using high temperature silicides
Grant 10,685,888 - Adusumilli , et al.
2020-06-16
Liner and cap structures for reducing local interconnect vertical resistance without compromising reliability
Grant 10,685,876 - Fan , et al.
2020-06-16
Fabrication Of Field Effect Transistors With Different Threshold Voltages Through Modified Channel Interfaces
App 20200185380 - Ando; Takashi ;   et al.
2020-06-11
Fabrication Of Field Effect Transistors With Different Threshold Voltages Through Modified Channel Interfaces
App 20200185381 - Ando; Takashi ;   et al.
2020-06-11
Oxide isolated fin-type field-effect transistors
Grant 10,680,083 - Bao , et al.
2020-06-09
Replacement metal gate process for vertical transport field-effect transistors with multiple threshold voltages
Grant 10,672,670 - Bao , et al.
2020-06-02
Replacement metal gate process for vertical transport field-effect transistor with self-aligned shared contacts
Grant 10,672,905 - Bao , et al.
2020-06-02
Self-aligned Bottom Source/drain Epitaxial Growth In Vertical Field Effect Transistors
App 20200161451 - LEE; Choonghyun ;   et al.
2020-05-21
Replacement metal gate processes for vertical transport field-effect transistor
Grant 10,658,299 - Lee , et al.
2020-05-19
Semiconductor Device And Method Of Forming The Semiconductor Device
App 20200152631 - Chao; Robin Hsin Kuo ;   et al.
2020-05-14
Vertical Transport Field-effect Transistor Including Dual Layer Top Spacer
App 20200152766 - Jagannathan; Hemanth ;   et al.
2020-05-14
Vertical Transport Field Effect Transistor Structure With Self-aligned Top Junction Through Early Top Source/drain Epitaxy
App 20200152791 - Mochizuki; Shogo ;   et al.
2020-05-14
Efficient metal-insulator-metal capacitor
Grant 10,651,266 - Chung , et al.
2020-05-12
Complementary Metal Oxide Semiconductor Replacement Gate High-k Metal Gate Devices With Work Function Adjustments
App 20200144134 - Edge; Lisa F. ;   et al.
2020-05-07
Structure and method for multiple threshold voltage definition in advanced CMOS device technology
Grant 10,636,792 - Jagannathan , et al.
2020-04-28
Single-fin Cmos Transistors With Embedded And Cladded Source/drain Structures
App 20200118886 - Miao; Xin ;   et al.
2020-04-16
Formation of common interfacial layer on Si/SiGe dual channel complementary metal oxide semiconductor device
Grant 10,615,083 - Bao , et al.
2020-04-07
VFET metal gate patterning for vertical transport field effect transistor
Grant 10,615,082 - Anderson , et al.
2020-04-07
Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor device
Grant 10,615,043 - Ando , et al.
2020-04-07
Fabrication of field effect transistors with different threshold voltages through modified channel interfaces
Grant 10,607,990 - Ando , et al.
2020-03-31
Oxide Isolated Fin-type Field-effect Transistors
App 20200091319 - Bao; Ruqiang ;   et al.
2020-03-19
Liner And Cap Structures For Reducing Local Interconnect Vertical Resistance Without Compromising Reliability
App 20200090990 - Fan; Su Chen ;   et al.
2020-03-19
Liner And Cap Structures For Reducing Local Interconnect Vertical Resistance Without Compromising Reliability
App 20200090989 - Fan; Su Chen ;   et al.
2020-03-19
Vertical transport field effect transistor structure with self-aligned top junction through early top source/drain epitaxy
Grant 10,593,797 - Mochizuki , et al.
2020-03-17
Wrap-around-contact Structure For Top Source/drain In Vertical Fets
App 20200075737 - Lee; Choonghyun ;   et al.
2020-03-05
Low-resistance Top Contact On Vtfet
App 20200075746 - Waskiewicz; Christopher J. ;   et al.
2020-03-05
Wrap-around-contact Structure For Top Source/drain In Vertical Fets
App 20200075736 - Lee; Choonghyun ;   et al.
2020-03-05
Approach to control over-etching of bottom spacers in vertical fin field effect transistor devices
Grant 10,580,881 - Bao , et al.
2020-03-03
Gate-last Process For Vertical Transport Field-effect Transistor
App 20200066604 - Mochizuki; Shogo ;   et al.
2020-02-27
Replacement Metal Gate Process For Vertical Transport Field-effect Transistor With Self-aligned Shared Contacts
App 20200066903 - Bao; Ruqiang ;   et al.
2020-02-27
Replacement Metal Gate Process For Vertical Transport Field-effect Transistors With Multiple Threshold Voltages
App 20200066603 - Bao; Ruqiang ;   et al.
2020-02-27
VTFET devices utilizing low temperature selective epitaxy
Grant 10,573,746 - Jagannathan , et al. Feb
2020-02-25
Complementary metal oxide semiconductor replacement gate high-k metal gate devices with work function adjustments
Grant 10,573,565 - Edge , et al. Feb
2020-02-25
Gate Stack Reliability In Vertical Transport Field Effect Transistors
App 20200058766 - LEE; Choonghyun ;   et al.
2020-02-20
Vertical transport field-effect transistor including air-gap top spacer
Grant 10,559,671 - Jagannathan , et al. Feb
2020-02-11
Vertical transport field-effect transistor including dual layer top spacer
Grant 10,559,672 - Jagannathan , et al. Feb
2020-02-11
Multi-metal dipole doping to offer multi-threshold voltage pairs without channel doping for highly scaling CMOS device
Grant 10,546,787 - Bao , et al. Ja
2020-01-28
Semiconductor device and method of forming the semiconductor device
Grant 10,541,239 - Chao , et al. Ja
2020-01-21
Multi-metal Dipole Doping To Offer Multi-threshold Voltage Pairs Without Channel Doping For Highly Scaling Cmos Device
App 20200020594 - Bao; Ruqiang ;   et al.
2020-01-16
Multi-metal Dipole Doping To Offer Multi-threshold Voltage Pairs Without Channel Doping For Highly Scaling Cmos Device
App 20200020595 - Bao; Ruqiang ;   et al.
2020-01-16
Formation Of Pure Silicon Oxide Interfacial Layer On Silicon-germanium Channel Field Effect Transistor Device
App 20200020539 - Ando; Takashi ;   et al.
2020-01-16
Fast Recrystallization Of Hafnium Or Zirconium Based Oxides In Insulator-metal Structures
App 20200020762 - Frank; Martin M. ;   et al.
2020-01-16
FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation
Grant 10,535,773 - Guo , et al. Ja
2020-01-14
Approach To Control Over-etching Of Bottom Spacers In Vertical Fin Field Effect Transistor Devices
App 20200013877 - Bao; Ruqiang ;   et al.
2020-01-09
Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor device
Grant 10,529,573 - Ando , et al. J
2020-01-07
Vertical Transport Field Effect Transistor Structure With Self-aligned Top Junction Through Early Top Source/drain Epitaxy
App 20190393341 - Mochizuki; Shogo ;   et al.
2019-12-26
Reduced Static Random Access Memory (sram) Device Foot Print Through Controlled Bottom Source/drain Placement
App 20190378767 - Bao; Ruqiang ;   et al.
2019-12-12
Silicon-germanium Fin structure having silicon-rich outer surface
Grant 10,504,997 - Jagannathan , et al. Dec
2019-12-10
Multi-metal Dipole Doping To Offer Multi-threshold Voltage Pairs Without Channel Doping For Highly Scaling Cmos Device
App 20190371676 - Bao; Ruqiang ;   et al.
2019-12-05
Formation Of Pure Silicon Oxide Interfacial Layer On Silicon-germanium Channel Field Effect Transistor Device
App 20190371611 - Ando; Takashi ;   et al.
2019-12-05
Wrap-around-contact structure for top source/drain in vertical FETs
Grant 10,483,361 - Lee , et al. Nov
2019-11-19
Vertical transistors having improved gate length control using uniformly deposited spacers
Grant 10,461,172 - Waskiewicz , et al. Oc
2019-10-29
Interface Charge Reduction for SiGe Surface
App 20190326429 - Sadana; Devendra ;   et al.
2019-10-24
MASKLESS EPITAXIAL GROWTH OF PHOSPHORUS-DOPED Si AND BORON-DOPED SiGe (Ge) FOR ADVANCED SOURCE/DRAIN CONTACT
App 20190318969 - Lee; Choonghyun ;   et al.
2019-10-17
Formation Of Self-aligned Bottom Spacer For Vertical Transistors
App 20190319114 - BAO; RUQIANG ;   et al.
2019-10-17
MASKLESS EPITAXIAL GROWTH OF PHOSPHORUS-DOPED Si AND BORON-DOPED SiGe (Ge) FOR ADVANCED SOURCE/DRAIN CONTACT
App 20190318970 - Lee; Choonghyun ;   et al.
2019-10-17
Formation of self-aligned bottom spacer for vertical transistors
Grant 10,439,043 - Bao , et al. O
2019-10-08
Stacked Mim Capacitors With Self-aligned Contact To Reduce Via Enclosure
App 20190305076 - Ando; Takashi ;   et al.
2019-10-03
Maskless epitaxial growth of phosphorus-doped Si and boron-doped SiGe (Ge) for advanced source/drain contact
Grant 10,431,502 - Lee , et al. O
2019-10-01
Structure And Method For Multiple Threshold Voltage Definition In Advanced Cmos Device Technology
App 20190287970 - Jagannathan; Hemanth ;   et al.
2019-09-19
Replacement Metal Gate Processes For Vertical Transport Field-effect Transistor
App 20190267325 - Lee; Choonghyun ;   et al.
2019-08-29
Simplified gate stack process to improve dual channel CMOS performance
Grant 10,395,080 - Jagannathan , et al. A
2019-08-27
Simplified gate stack process to improve dual channel CMOS performance
Grant 10,395,079 - Jagannathan , et al. A
2019-08-27
Multi-layer work function metal gates with similar gate thickness to achieve multi-Vt for vFETs
Grant 10,395,989 - Bao , et al. A
2019-08-27
Leakage current reduction in stacked metal-insulator-metal capacitors
Grant 10,396,146 - Ando , et al. A
2019-08-27
Structure and method for multiple threshold voltage definition in advanced CMOS device technology
Grant 10,396,076 - Jagannathan , et al. A
2019-08-27
Vertical Transport Field-effect Transistor Including Air-gap Top Spacer
App 20190259854 - Jagannathan; Hemanth ;   et al.
2019-08-22
Leakage current reduction in stacked metal-insulator-metal capacitors
Grant 10,381,433 - Ando , et al. A
2019-08-13
Interface charge reduction for SiGe surface
Grant 10,381,479 - Sadana , et al. A
2019-08-13
Replacement metal gate processes for vertical transport field-effect transistor
Grant 10,373,912 - Lee , et al.
2019-08-06
Dual Channel Silicon/silicon Germanium Complementary Metal Oxide Semiconductor Performance With Interface Engineering
App 20190229020 - Bao; Ruqiang ;   et al.
2019-07-25
Dual channel silicon/silicon germanium complementary metal oxide semiconductor performance with interface engineering
Grant 10,361,130 - Bao , et al.
2019-07-23
Self-aligned double patterning formed fincut
Grant 10,361,129 - Sieg , et al.
2019-07-23
Replacement Metal Gate Processes For Vertical Transport Field-effect Transistor
App 20190214343 - Lee; Choonghyun ;   et al.
2019-07-11
Method of forming a dual metal interconnect structure
Grant 10,340,355 - Adusumilli , et al.
2019-07-02
Formation Of Full Metal Gate To Suppress Interficial Layer Growth
App 20190198500 - BAO; RUQIANG ;   et al.
2019-06-27
Vertical Transistors Having Improved Gate Length Control Using Uniformly Deposited Spacers
App 20190198642 - Waskiewicz; Christopher J. ;   et al.
2019-06-27
Formation Of Self-aligned Bottom Spacer For Vertical Transistors
App 20190189774 - BAO; RUQIANG ;   et al.
2019-06-20
Complementary Metal Oxide Semiconductor Replacement Gate High-k Metal Gate Devices With Work Function Adjustments
App 20190189524 - Edge; Lisa F. ;   et al.
2019-06-20
FORMATION OF COMMON INTERFACIAL LAYER ON Si/SiGe DUAL CHANNEL COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE
App 20190181052 - Bao; Ruqiang ;   et al.
2019-06-13
Vfet Metal Gate Patterning For Vertical Transport Field Effect Transistor
App 20190181051 - Anderson; Brent A. ;   et al.
2019-06-13
Vertical transport field-effect transistor including air-gap top spacer
Grant 10,319,833 - Jagannathan , et al.
2019-06-11
Vertical Transport Field-effect Transistor Including Dual Layer Top Spacer
App 20190172924 - Jagannathan; Hemanth ;   et al.
2019-06-06
Vertical Transport Field-effect Transistor Including Air-gap Top Spacer
App 20190172927 - Jagannathan; Hemanth ;   et al.
2019-06-06
Multi-layer work function metal gates with similar gate thickness to achieve multi-VT for VFETs
Grant 10,312,147 - Bao , et al. June 4, 2
2019-06-04
Single source/drain epitaxy for co-integrating nFET semiconductor fins and pFET semiconductor fins
Grant 10,304,831 - Jagannathan , et al.
2019-05-28
Maskless method to reduce source-drain contact resistance in CMOS devices
Grant 10,304,938 - Adusumilli , et al.
2019-05-28
Complementary metal oxide semiconductor replacement gate high-K metal gate devices with work function adjustments
Grant 10,304,746 - Edge , et al.
2019-05-28
Finfet With Sigma Recessed Source/drain And Un-doped Buffer Layer Epitaxy For Uniform Junction Formation
App 20190157457 - Guo; Dechao ;   et al.
2019-05-23
Formation of full metal gate to suppress interficial layer growth
Grant 10,297,598 - Bao , et al.
2019-05-21
Uniform threshold voltage for nanosheet devices
Grant 10,297,671 - Bao , et al.
2019-05-21
Multilayer dielectric for metal-insulator-metal capacitor (MIMCAP) capacitance and leakage improvement
Grant 10,290,700 - Ando , et al.
2019-05-14
Approach to control over-etching of bottom spacers in vertical fin field effect transistor devices
Grant 10,283,620 - Bao , et al.
2019-05-07
Formation of self-aligned bottom spacer for vertical transistors
Grant 10,276,687 - Bao , et al.
2019-04-30
Formation of common interfacial layer on Si/SiGe dual channel complementary metal oxide semiconductor device
Grant 10,256,159 - Bao , et al.
2019-04-09
Dual work function CMOS devices
Grant 10,256,161 - Jagannathan , et al.
2019-04-09
Efficient metal-insulator-metal capacitor fabrication
Grant 10,256,289 - Chung , et al.
2019-04-09
FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation
Grant 10,249,758 - Guo , et al.
2019-04-02
Dual channel CMOS having common gate stacks
Grant 10,249,540 - Ando , et al.
2019-04-02
VFET metal gate patterning for vertical transport field effect transistor
Grant 10,236,219 - Anderson , et al.
2019-03-19
Dual channel CMOS having common gate stacks
Grant 10,229,856 - Ando , et al.
2019-03-12
Fabrication of silicon-germanium fin structure having silicon-rich outer surface
Grant 10,229,975 - Jagannathan , et al.
2019-03-12
Vertical transport field-effect transistor including dual layer top spacer
Grant 10,229,986 - Jagannathan , et al.
2019-03-12
Interface Charge Reduction for SiGe Surface
App 20190035923 - Sadana; Devendra ;   et al.
2019-01-31
Controlling threshold voltage in nanosheet transistors
Grant 10,170,316 - Jagannathan , et al. J
2019-01-01
Finfet With Sigma Recessed Source/drain And Un-doped Buffer Layer Epitaxy For Uniform Junction Formation
App 20180358465 - Guo; Dechao ;   et al.
2018-12-13
Uniform Threshold Voltage For Nanosheet Devices
App 20180350935 - Bao; Ruqiang ;   et al.
2018-12-06
Efficient Metal-insulator-metal Capacitor
App 20180350896 - Chung; Kisup ;   et al.
2018-12-06
Method to reduce variability in contact resistance
Grant 10,147,680 - Adusumilli , et al. De
2018-12-04
Bottom Contact Resistance Reduction On Vfet
App 20180337277 - Bao; Ruqiang ;   et al.
2018-11-22
Dual Channel Cmos Having Common Gate Stacks
App 20180337098 - Ando; Takashi ;   et al.
2018-11-22
Dual Channel Cmos Having Common Gate Stacks
App 20180337097 - Ando; Takashi ;   et al.
2018-11-22
Fabrication Of Field Effect Transistors With Different Threshold Voltages Through Modified Channel Interfaces
App 20180331096 - Ando; Takashi ;   et al.
2018-11-15
Bottom contact resistance reduction on VFET
Grant 10,128,372 - Bao , et al. November 13, 2
2018-11-13
Dual Channel Silicon/silicon Germanium Complementary Metal Oxide Semiconductor Performance With Interface Engineering
App 20180315663 - Bao; Ruqiang ;   et al.
2018-11-01
Multi-layer Work Function Metal Gates With Similar Gate Thickness To Achieve Multi-vt For Vfets
App 20180294191 - Bao; Ruqiang ;   et al.
2018-10-11
Multi-layer Work Function Metal Gates With Similar Gate Thickness To Achieve Multi-vt For Vfets
App 20180294192 - Bao; Ruqiang ;   et al.
2018-10-11
Vtfet Devices Utilizing Low Temperature Selective Epitaxy
App 20180294354 - JAGANNATHAN; HEMANTH ;   et al.
2018-10-11
FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation
Grant 10,096,713 - Guo , et al. October 9, 2
2018-10-09
Semiconductor Device And Method Of Forming The Semiconductor Device
App 20180286862 - Chao; Robin Hsin-Ku ;   et al.
2018-10-04
Efficient metal-insulator-metal capacitor
Grant 10,090,378 - Chung , et al. October 2, 2
2018-10-02
Surface Area Enhancement For Stacked Metal-insulator-metal (mim) Capacitor
App 20180277623 - Ando; Takashi ;   et al.
2018-09-27
Structure And Method For Multiple Threshold Voltage Definition In Advanced Cmos Device Technology
App 20180277540 - Jagannathan; Hemanth ;   et al.
2018-09-27
Surface Area Enhancement For Stacked Metal-insulator-metal (mim) Capacitor
App 20180277621 - Ando; Takashi ;   et al.
2018-09-27
Bottom contact resistance reduction on VFET
Grant 10,084,082 - Bao , et al. September 25, 2
2018-09-25
Uniform threshold voltage for nanosheet devices
Grant 10,084,055 - Bao , et al. September 25, 2
2018-09-25
Efficient Metal-insulator-metal Capacitor
App 20180269271 - Chung; Kisup ;   et al.
2018-09-20
Efficient Metal-insulator-metal Capacitor Fabrication
App 20180269274 - Chung; Kisup ;   et al.
2018-09-20
Semiconductor device and method of forming the semiconductor device
Grant 10,079,233 - Chao , et al. September 18, 2
2018-09-18
Simplified Gate Stack Process To Improve Dual Channel Cmos Performance
App 20180247097 - Jagannathan; Hemanth ;   et al.
2018-08-30
Simplified Gate Stack Process To Improve Dual Channel Cmos Performance
App 20180247096 - Jagannathan; Hemanth ;   et al.
2018-08-30
Multilayer Dielectric For Metal-insulator-metal Capacitor (mimcap) Capacitance And Leakage Improvement
App 20180240863 - Ando; Takashi ;   et al.
2018-08-23
Multilayer Dielectric For Metal-insulator-metal Capacitor (mimcap) Capacitance And Leakage Improvement
App 20180240861 - Ando; Takashi ;   et al.
2018-08-23
Multilayer Dielectric For Metal-insulator-metal Capacitor (mimcap) Capacitance And Leakage Improvement
App 20180240862 - Ando; Takashi ;   et al.
2018-08-23
VTFET devices utilizing low temperature selective epitaxy
Grant 10,056,484 - Jagannathan , et al. August 21, 2
2018-08-21
Formation Of Pure Silicon Oxide Interfacial Layer On Silicon-germanium Channel Field Effect Transistor Device
App 20180233370 - Ando; Takashi ;   et al.
2018-08-16
Formation Of Pure Silicon Oxide Interfacial Layer On Silicon-germanium Channel Field Effect Transistor Device
App 20180233369 - Ando; Takashi ;   et al.
2018-08-16
Uniform Threshold Voltage For Nanosheet Devices
App 20180226484 - Bao; Ruqiang ;   et al.
2018-08-09
Method To Reduce Variability In Contact Resistance
App 20180226352 - ADUSUMILLI; Praneet ;   et al.
2018-08-09
Approach To Control Over-etching Of Bottom Spacers In Vertical Fin Field Effect Transistor Devices
App 20180212040 - Bao; Ruqiang ;   et al.
2018-07-26
Approach To Control Over-etching Of Bottom Spacers In Vertical Fin Field Effect Transistor Devices
App 20180212037 - Bao; Ruqiang ;   et al.
2018-07-26
Leakage Current Reduction In Stacked Metal-insulator-metal Capacitors
App 20180212018 - Ando; Takashi ;   et al.
2018-07-26
FORMATION OF COMMON INTERFACIAL LAYER ON Si/SiGe DUAL CHANNEL COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE
App 20180211885 - Bao; Ruqiang ;   et al.
2018-07-26
Formation Of Full Metal Gate To Suppress Interficial Layer Growth
App 20180204839 - BAO; RUQIANG ;   et al.
2018-07-19
Leakage Current Reduction In Stacked Metal-insulator-metal Capacitors
App 20180197944 - Ando; Takashi ;   et al.
2018-07-12
Leakage Current Reduction In Stacked Metal-insulator-metal Capacitors
App 20180197945 - Ando; Takashi ;   et al.
2018-07-12
Leakage Current Reduction In Stacked Metal-insulator-metal Capacitors
App 20180197943 - Ando; Takashi ;   et al.
2018-07-12
Leakage current reduction in stacked metal-insulator-metal capacitors
Grant 10,020,359 - Ando , et al. July 10, 2
2018-07-10
Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor device
Grant 10,008,386 - Ando , et al. June 26, 2
2018-06-26
Multi-layer work function metal gates with similar gate thickness to achieve multi-Vt for vFETS
Grant 10,002,791 - Bao , et al. June 19, 2
2018-06-19
Simplified gate stack process to improve dual channel CMOS performance
Grant 9,984,263 - Jagannathan , et al. May 29, 2
2018-05-29
High-k Layer Chamfering To Prevent Oxygen Ingress In Replacement Metal Gate (rmg) Process
App 20180145150 - Ando; Takashi ;   et al.
2018-05-24
Method of cutting fins to create diffusion breaks for finFETs
Grant 9,978,748 - Jagannathan , et al. May 22, 2
2018-05-22
Low Resistance Source-drain Contacts Using High Temperature Silicides
App 20180138093 - ADUSUMILLI; Praneet ;   et al.
2018-05-17
Vtfet Devices Utilizing Low Temperature Selective Epitaxy
App 20180122937 - JAGANNATHAN; HEMANTH ;   et al.
2018-05-03
Low Resistance Source-drain Contacts Using High Temperature Silicides
App 20180122646 - ADUSUMILLI; Praneet ;   et al.
2018-05-03
Bottom contact resistance reduction on VFET
Grant 9,960,272 - Bao , et al. May 1, 2
2018-05-01
III-V fin on insulator
Grant 9,954,106 - Cheng , et al. April 24, 2
2018-04-24
Selective thickening of pFET dielectric
Grant 9,941,371 - Ando , et al. April 10, 2
2018-04-10
Simplified Gate Stack Process To Improve Dual Channel Cmos Performance
App 20180089479 - Jagannathan; Hemanth ;   et al.
2018-03-29
Semiconductor Device And Method Of Forming The Semiconductor Device
App 20180090494 - CHAO; Robin Hsin-Ku ;   et al.
2018-03-29
Controlling Threshold Voltage In Nanosheet Transistors
App 20180090326 - Jagannathan; Hemanth ;   et al.
2018-03-29
Maskless Method To Reduce Source-drain Contact Resistance In Cmos Devices
App 20180083114 - ADUSUMILLI; Praneet ;   et al.
2018-03-22
Formation Of Pure Silicon Oxide Interfacial Layer On Silicon-germanium Channel Field Effect Transistor Device
App 20180076040 - Ando; Takashi ;   et al.
2018-03-15
III-V semiconductor CMOS FinFET device
Grant 9,917,089 - Jagannathan , et al. March 13, 2
2018-03-13
Low Resistance Source-drain Contacts Using High Temperature Silicides
App 20180068904 - ADUSUMILLI; Praneet ;   et al.
2018-03-08
Low Resistance Source-drain Contacts Using High Temperature Silicides
App 20180068857 - ADUSUMILLI; Praneet ;   et al.
2018-03-08
Low Resistance Source-drain Contacts Using High Temperature Silicides
App 20180068903 - ADUSUMILLI; Praneet ;   et al.
2018-03-08
Maskless Method To Reduce Source-drain Contact Resistance In Cmos Devices
App 20180061956 - ADUSUMILLI; Praneet ;   et al.
2018-03-01
Replacement gate electrode with multi-thickness conductive metallic nitride layers
Grant 9,881,797 - Jagannathan , et al. January 30, 2
2018-01-30
Fabrication Of Silicon-germanium Fin Structure Having Silicon-rich Outer Surface
App 20180026100 - Jagannathan; Hemanth ;   et al.
2018-01-25
Fabrication Of Silicon-germanium Fin Structure Having Silicon-rich Outer Surface
App 20180026101 - Jagannathan; Hemanth ;   et al.
2018-01-25
Divot-free planarization dielectric layer for replacement gate
Grant 9,876,091 - Jagannathan , et al. January 23, 2
2018-01-23
High-K layer chamfering to prevent oxygen ingress in replacement metal gate (RMG) process
Grant 9,865,703 - Ando , et al. January 9, 2
2018-01-09
VTFET devices utilizing low temperature selective epitaxy
Grant 9,865,730 - Jagannathan , et al. January 9, 2
2018-01-09
Method to reduce variability in contact resistance
Grant 9,837,357 - Adusumilli , et al. December 5, 2
2017-12-05
Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme
Grant 9,824,930 - Ando , et al. November 21, 2
2017-11-21
Controlling threshold voltage in nanosheet transistors
Grant 9,818,616 - Jagannathan , et al. November 14, 2
2017-11-14
Dual Metal Interconnect Structure
App 20170278939 - Adusumilli; Praneet ;   et al.
2017-09-28
Fabrication of silicon-germanium fin structure having silicon-rich outer surface
Grant 9,773,875 - Jagannathan , et al. September 26, 2
2017-09-26
Stacked planar capacitors with scaled EOT
Grant 9,761,655 - Ando , et al. September 12, 2
2017-09-12
Isolation of bulk FET devices with embedded stressors
Grant 9,761,722 - Jagannathan , et al. September 12, 2
2017-09-12
SINGLE SOURCE/DRAIN EPITAXY FOR CO-INTEGRATING nFET SEMICONDUCTOR FINS AND pFET SEMICONDUCTOR FINS
App 20170256546 - Jagannathan; Hemanth ;   et al.
2017-09-07
Structure for integration of an III-V compound semiconductor on SOI
Grant 9,754,967 - Jagannathan , et al. September 5, 2
2017-09-05
Dual Metal Interconnect Structure
App 20170243947 - Adusumilli; Praneet ;   et al.
2017-08-24
Simplified gate stack process to improve dual channel CMOS performance
Grant 9,741,822 - Jagannathan , et al. August 22, 2
2017-08-22
Dual metal interconnect structure
Grant 9,741,812 - Adusumilli , et al. August 22, 2
2017-08-22
Dual Work Function Cmos Devices
App 20170236759 - Jagannathan; Hemanth ;   et al.
2017-08-17
Iii-v Semiconductor Cmos Finfet Device
App 20170229459 - Jagannathan; Hemanth ;   et al.
2017-08-10
Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme
Grant 9,721,842 - Ando , et al. August 1, 2
2017-08-01
Metal cap protection layer for gate and contact metallization
Grant 9,722,038 - Adusumilli , et al. August 1, 2
2017-08-01
High-k Layer Chamfering To Prevent Oxygen Ingress In Replacement Metal Gate (rmg) Process
App 20170194459 - Ando; Takashi ;   et al.
2017-07-06
Method Of Cutting Fins To Create Diffusion Breaks For Finfets
App 20170170171 - Jagannathan; Hemanth ;   et al.
2017-06-15
Method Of Cutting Fins To Create Diffusion Breaks For Finfets
App 20170170176 - Jagannathan; Hemanth ;   et al.
2017-06-15
Complementary Metal Oxide Semiconductor Replacement Gate High-k Metal Gate Devices With Work Function Adjustments
App 20170154825 - Edge; Lisa F. ;   et al.
2017-06-01
Contained punch through stopper for CMOS structures on a strain relaxed buffer substrate
Grant 9,666,486 - Ebrish , et al. May 30, 2
2017-05-30
Single source/drain epitaxy for co-integrating nFET semiconductor fins and pFET semiconductor fins
Grant 9,659,938 - Jagannathan , et al. May 23, 2
2017-05-23
Controlling threshold voltage in nanosheet transistors
Grant 9,653,537 - Jagannathan , et al. May 16, 2
2017-05-16
Structure For Integration Of An Iii-v Compound Semiconductor On Soi
App 20170125444 - Jagannathan; Hemanth ;   et al.
2017-05-04
Structure and method for replacement gate integration with self-aligned contacts
Grant 9,627,510 - Jagannathan , et al. April 18, 2
2017-04-18
Stratified gate dielectric stack for gate dielectric leakage reduction
Grant 9,627,214 - Jagannathan , et al. April 18, 2
2017-04-18
Iii-v Fin On Insulator
App 20170084732 - Cheng; Kangguo ;   et al.
2017-03-23
Metal Cap Protection Layer For Gate And Contact Metallization
App 20170077256 - ADUSUMILLI; PRANEET ;   et al.
2017-03-16
Silicon-germanium semiconductor devices and method of making
Grant 9,595,449 - Jagannathan , et al. March 14, 2
2017-03-14
Fin cut enabling single diffusion breaks
Grant 9,589,845 - Jagannathan , et al. March 7, 2
2017-03-07
Solid state diffusion doping for bulk finFET devices
Grant 9,583,489 - Anderson , et al. February 28, 2
2017-02-28
Dual metal gate electrode for reducing threshold voltage
Grant 9,577,062 - Jagannathan , et al. February 21, 2
2017-02-21
Selective thickening of PFET dielectric
Grant 9,570,569 - Ando , et al. February 14, 2
2017-02-14
Structure for integration of an III-V compound semiconductor on SOI
Grant 9,548,319 - Jagannathan , et al. January 17, 2
2017-01-17
Replacement metal gate finFET
Grant 9,530,651 - Jagannathan , et al. December 27, 2
2016-12-27
III-V semiconductor CMOS FinFET device
Grant 9,515,073 - Jagannathan , et al. December 6, 2
2016-12-06
Stratified gate dielectric stack for gate dielectric leakage reduction
Grant 9,514,948 - Jagannathan , et al. December 6, 2
2016-12-06
Method Of Patterning Dopant Films In High-k Dielectrics In A Soft Mask Integration Scheme
App 20160351452 - Ando; Takashi ;   et al.
2016-12-01
Selective Thickening Of Pfet Dielectric
App 20160343622 - Ando; Takashi ;   et al.
2016-11-24
Selective thickening of pFET dielectric
Grant 9,496,183 - Ando , et al. November 15, 2
2016-11-15
Selective Thickening Of Pfet Dielectric
App 20160329409 - Ando; Takashi ;   et al.
2016-11-10
Selective Thickening Of Pfet Dielectric
App 20160329254 - Ando; Takashi ;   et al.
2016-11-10
Complementary metal oxide semiconductor replacement gate high-k metal gate devices with work function adjustments
Grant 9,490,255 - Edge , et al. November 8, 2
2016-11-08
III-V fin on insulator
Grant 9,484,439 - Cheng , et al. November 1, 2
2016-11-01
Stratified Gate Dielectric Stack For Gate Dielectric Leakage Reduction
App 20160315166 - Jagannathan; Hemanth ;   et al.
2016-10-27
Stratified Gate Dielectric Stack For Gate Dielectric Leakage Reduction
App 20160314977 - Jagannathan; Hemanth ;   et al.
2016-10-27
Method of patterning dopant films in high-K dielectrics in a soft mask integration scheme
Grant 9,472,419 - Ando , et al. October 18, 2
2016-10-18
Nitridation on HDP oxide before high-k deposition to prevent oxygen ingress
Grant 9,472,408 - Ando , et al. October 18, 2
2016-10-18
Replacement metal gate FinFET
Grant 9,472,407 - Jagannathan , et al. October 18, 2
2016-10-18
Divot-free Planarization Dielectric Layer For Replacement Gate
App 20160276457 - Jagannathan; Hemanth ;   et al.
2016-09-22
Structure For Integration Of An Iii-v Compound Semiconductor On Soi
App 20160268310 - Jagannathan; Hemanth ;   et al.
2016-09-15
Replacement metal gate FinFET
Grant 9,437,436 - Jagannathan , et al. September 6, 2
2016-09-06
Non-volatile memory device employing semiconductor nanoparticles
Grant 9,425,080 - Cheng , et al. August 23, 2
2016-08-23
Nitridation on HDP oxide before high-k deposition to prevent oxygen ingress
Grant 9,412,596 - Ando , et al. August 9, 2
2016-08-09
Nitridation On Hdp Oxide Before High-k Deposition To Prevent Oxygen Ingress
App 20160225628 - Ando; Takashi ;   et al.
2016-08-04
Nitridation On Hdp Oxide Before High-k Deposition To Prevent Oxygen Ingress
App 20160225629 - Ando; Takashi ;   et al.
2016-08-04
Integration of multiple threshold voltage devices for complementary metal oxide semiconductor using full metal gate
Grant 9,406,679 - Edge , et al. August 2, 2
2016-08-02
SINGLE SOURCE/DRAIN EPITAXY FOR CO-INTEGRATING nFET SEMICONDUCTOR FINS AND pFET SEMICONDUCTOR FINS
App 20160211265 - Jagannathan; Hemanth ;   et al.
2016-07-21
Forming wrap-around silicide contact on finFET
Grant 9,397,197 - Guo , et al. July 19, 2
2016-07-19
Stratified gate dielectric stack for gate dielectric leakage reduction
Grant 9,385,207 - Jagannathan , et al. July 5, 2
2016-07-05
Method Of Patterning Dopant Films In High-k Dielectrics In A Soft Mask Integration Scheme
App 20160190015 - Ando; Takashi ;   et al.
2016-06-30
Divot-free planarization dielectric layer for replacement gate
Grant 9,356,121 - Jagannathan , et al. May 31, 2
2016-05-31
Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme
Grant 9,330,938 - Ando , et al. May 3, 2
2016-05-03
Dual Metal Gate Electrode For Reducing Threshold Voltage
App 20160118470 - Jagannathan; Hemanth ;   et al.
2016-04-28
Forming wrap-around silicide contact on finFET
Grant 9,318,581 - Guo , et al. April 19, 2
2016-04-19
Single Source/drain Epitaxy For Co-integrating Nfet Semiconductor Fins And Pfet Semiconductor Fins
App 20160093618 - Jagannathan; Hemanth ;   et al.
2016-03-31
Single source/drain epitaxy for co-integrating nFET semiconductor fins and pFET semiconductor fins
Grant 9,299,706 - Jagannathan , et al. March 29, 2
2016-03-29
Method Of Patterning Dopant Films In High-k Dielectrics In A Soft Mask Integration Scheme
App 20160049337 - Ando; Takashi ;   et al.
2016-02-18
Method Of Patterning Dopant Films In High-k Dielectrics In A Soft Mask Integration Scheme
App 20160027664 - Ando; Takashi ;   et al.
2016-01-28
Replacement gate electrode with multi-thickness conductive metallic nitride layers
Grant 9,202,698 - Jagannathan , et al. December 1, 2
2015-12-01
Integration Of Multiple Threshold Voltage Devices For Complementary Metal Oxide Semiconductor Using Full Metal Gate
App 20150333065 - Edge; Lisa F. ;   et al.
2015-11-19
Replacement metal gate transistor with controlled threshold voltage
Grant 9,190,409 - Manabe , et al. November 17, 2
2015-11-17
Structure And Method To Obtain Eot Scaled Dielectric Stacks
App 20150311303 - Jagannathan; Hemanth ;   et al.
2015-10-29
Structure And Method To Obtain Eot Scaled Dielectric Stacks
App 20150311127 - Jagannathan; Hemanth ;   et al.
2015-10-29
Replacement metal gate FinFET
Grant 9,153,447 - Jagannathan , et al. October 6, 2
2015-10-06
Structure And Method To Obtain Eot Scaled Dielectric Stacks
App 20150279746 - Jagannathan; Hemanth ;   et al.
2015-10-01
Structure And Method To Obtain Eot Scaled Dielectric Stacks
App 20150279937 - Jagannathan; Hemanth ;   et al.
2015-10-01
Integration of multiple threshold voltage devices for complementary metal oxide semiconductor using full metal gate
Grant 9,093,558 - Edge , et al. July 28, 2
2015-07-28
Replacement metal gate FinFET
Grant 9,093,376 - Jagannathan , et al. July 28, 2
2015-07-28
Structure and method to realize conformal doping in deep trench applications
Grant 9,064,744 - Basker , et al. June 23, 2
2015-06-23
Stratified Gate Dielectric Stack For Gate Dielectric Leakage Reduction
App 20150171182 - Jagannathan; Hemanth ;   et al.
2015-06-18
Structure and method to obtain EOT scaled dielectric stacks
Grant 9,059,314 - Jagannathan , et al. June 16, 2
2015-06-16
Robust replacement gate integration
Grant 9,054,127 - Jagannathan , et al. June 9, 2
2015-06-09
Replacement Metal Gate Finfet
App 20150137245 - Jagannathan; Hemanth ;   et al.
2015-05-21
Replacement Metal Gate Finfet
App 20150137244 - Jagannathan; Hemanth ;   et al.
2015-05-21
Replacement Metal Gate Finfet
App 20150137243 - Jagannathan; Hemanth ;   et al.
2015-05-21
Non-volatile Memory Device Employing Semiconductor Nanoparticles
App 20150132896 - Cheng; Kangguo ;   et al.
2015-05-14
Stratified gate dielectric stack for gate dielectric leakage reduction
Grant 9,006,094 - Jagannathan , et al. April 14, 2
2015-04-14
Memory device having multiple dielectric gate stacks and related methods
Grant 9,006,816 - Khare , et al. April 14, 2
2015-04-14
Non-volatile memory device employing semiconductor nanoparticles
Grant 8,994,006 - Cheng , et al. March 31, 2
2015-03-31
Divot-free Planarization Dielectric Layer For Replacement Gate
App 20150001598 - Jagannathan; Hemanth ;   et al.
2015-01-01
Borderless contact for an aluminum-containing gate
Grant 8,906,793 - Kanakasabapathy , et al. December 9, 2
2014-12-09
FinFET device having reduce capacitance, access resistance, and contact resistance
Grant 8,900,936 - Kulkarni , et al. December 2, 2
2014-12-02
High performance non-planar semiconductor devices with metal filled inter-fin gaps
Grant 8,901,667 - Jagannathan , et al. December 2, 2
2014-12-02
Semiconductor device including multiple metal semiconductor alloy region and a gate structure covered by a continuous encapsulating layer
Grant 8,901,670 - Kanakasabapathy , et al. December 2, 2
2014-12-02
Structure and method for stress latching in non-planar semiconductor devices
Grant 8,890,255 - Kanakasabapathy , et al. November 18, 2
2014-11-18
Robust Replacement Gate Integration
App 20140327076 - Jagannathan; Hemanth ;   et al.
2014-11-06
Methods of manufacturing finFET devices
Grant 8,877,615 - Basker , et al. November 4, 2
2014-11-04
Memory device having multiple dielectric gate stacks with first and second dielectric layers and related methods
Grant 8,860,123 - Khare , et al. October 14, 2
2014-10-14
Memory Device Having Multiple Dielectric Gate Stacks And Related Methods
App 20140291749 - KHARE; Prasanna ;   et al.
2014-10-02
Memory Device Having Multiple Dielectric Gate Stacks With First And Second Dielectric Layers And Related Methods
App 20140291750 - KHARE; Prasanna ;   et al.
2014-10-02
finFET devices
Grant 8,847,323 - Basker , et al. September 30, 2
2014-09-30
Low external resistance ETSOI transistors
Grant 8,835,232 - Jagannathan , et al. September 16, 2
2014-09-16
Robust replacement gate integration
Grant 8,835,237 - Jagannathan , et al. September 16, 2
2014-09-16
Control of threshold voltages in high-k metal gate stack and structures for CMOS devices
Grant 8,835,260 - Jagannathan , et al. September 16, 2
2014-09-16
Replacement Metal Gate Transistor With Controlled Threshold Voltage
App 20140239407 - MANABE; Kenzo ;   et al.
2014-08-28
Method and structure for shallow trench isolation to mitigate active shorts
Grant 8,790,991 - Cummings , et al. July 29, 2
2014-07-29
Robust Replacement Gate Integration
App 20140124873 - Jagannathan; Hemanth ;   et al.
2014-05-08
Replacement Gate Electrode With Multi-thickness Conductive Metallic Nitride Layers
App 20140117466 - Jagannathan; Hemanth ;   et al.
2014-05-01
Replacement Metal Gate Finfet
App 20140110785 - Jagannathan; Hemanth ;   et al.
2014-04-24
Replacement Metal Gate Finfet
App 20140110784 - Jagannathan; Hemanth ;   et al.
2014-04-24
Non-volatile Memory Device Employing Semiconductor Nanoparticles
App 20140091281 - Cheng; Kangguo ;   et al.
2014-04-03
High Performance Non-planar Semiconductor Devices With Metal Filled Inter-fin Gaps
App 20140061815 - JAGANNATHAN; HEMANTH ;   et al.
2014-03-06
Integration Of Multiple Threshold Voltage Devices For Complementary Metal Oxide Semiconductor Using Full Metal Gate
App 20140054717 - Edge; Lisa F. ;   et al.
2014-02-27
Structure And Method To Realize Conformal Doping In Deep Trench Applications
App 20140038382 - Basker; Veeraraghavan S. ;   et al.
2014-02-06
Structure And Method To Realize Conformal Doping In Deep Trench Applications
App 20140035038 - Basker; Veeraraghavan S. ;   et al.
2014-02-06
Etch Resistant Barrier For Replacement Gate Integration
App 20130307079 - JAGANNATHAN; HEMANTH ;   et al.
2013-11-21
Borderless Contact For An Aluminum-Containing Gate
App 20130307033 - KANAKASABAPATHY; Sivananda K. ;   et al.
2013-11-21
Borderless Contact For An Aluminum-containing Gate
App 20130309852 - KANAKASABAPATHY; Sivananda K. ;   et al.
2013-11-21
Etch Resistant Barrier For Replacement Gate Integration
App 20130309856 - JAGANNATHAN; HEMANTH ;   et al.
2013-11-21
Divot-free Planarization Dielectric Layer For Replacement Gate
App 20130292746 - Jagannathan; Hemanth ;   et al.
2013-11-07
Stratified Gate Dielectric Stack For Gate Dielectric Leakage Reduction
App 20130277743 - Jagannathan; Hemanth ;   et al.
2013-10-24
Stratified Gate Dielectric Stack For Gate Dielectric Leakage Reduction
App 20130280902 - Jagannathan; Hemanth ;   et al.
2013-10-24
Replacement Gate With Reduced Gate Leakage Current
App 20130256802 - Jagannathan; Hemanth ;   et al.
2013-10-03
Replacement Gate With Reduced Gate Leakage Current
App 20130260549 - Jagannathan; Hemanth ;   et al.
2013-10-03
Divot-free Planarization Dielectric Layer For Replacement Gate
App 20130221413 - Jagannathan; Hemanth ;   et al.
2013-08-29
Replacement Gate Electrode With Multi-thickness Conductive Metallic Nitride Layers
App 20130221441 - Jagannathan; Hemanth ;   et al.
2013-08-29
Replacement Gate Electrode With Multi-thickness Conductive Metallic Nitride Layers
App 20130224939 - Jagannathan; Hemanth ;   et al.
2013-08-29
Replacement Gate Electrode With A Tantalum Alloy Metal Layer
App 20130214364 - Jagannathan; Hemanth ;   et al.
2013-08-22
Low External Resistance Etsoi Transistors
App 20130214358 - Jagannathan; Hemanth ;   et al.
2013-08-22
Low External Resistance Etsoi Transistors
App 20130217190 - Jagannathan; Hemanth ;   et al.
2013-08-22
Replacement Gate Electrode With A Tantalum Alloy Metal Layer
App 20130217220 - Jagannathan; Hemanth ;   et al.
2013-08-22
Structure And Method For Stress Latching In Non-planar Semiconductor Devices
App 20130187234 - Kanakasabapathy; Sivananda K. ;   et al.
2013-07-25
Semiconductor Device Including Multiple Metal Semiconductor Alloy Region And A Gate Structure Covered By A Continuous Encapsulating Layer
App 20120326217A1 -
2012-12-27

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