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Patent applications and USPTO patent grants for Jaffe; William S..The latest application filed is for "dual in-line memory module".
Patent | Date |
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Dual In-line Memory Module App 20210167038 - Lesartre; Gregg B. ;   et al. | 2021-06-03 |
Dual In-line Memory Module App 20200066676 - Lesartre; Gregg B. ;   et al. | 2020-02-27 |
Dual clock domain interface between CPU and memory bus Grant 5,448,715 - Lelm , et al. September 5, 1 | 1995-09-05 |
Flexible N-way memory interleaving Grant 5,293,607 - Brockmann , et al. March 8, 1 | 1994-03-08 |
Memory-resource-driven arbitration Grant 5,287,477 - Johnson , et al. February 15, 1 | 1994-02-15 |
Preservation of priority in computer bus arbitration Grant 5,265,223 - Brockmann , et al. November 23, 1 | 1993-11-23 |
Decreasing average time to access a computer bus by eliminating arbitration delay when the bus is idle Grant 5,255,373 - Brockmann , et al. October 19, 1 | 1993-10-19 |
Methods and apparatus for carrying out transactions in a computer system Grant 5,249,297 - Brockmann , et al. September 28, 1 | 1993-09-28 |
Fast CMOS bus receiver for detecting low voltage swings Grant 5,097,157 - Jaffe , et al. March 17, 1 | 1992-03-17 |
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