loadpatents
name:-0.033642053604126
name:-0.02995491027832
name:-0.001101016998291
Jaffe; Mark David Patent Filings

Jaffe; Mark David

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jaffe; Mark David.The latest application filed is for "transistor using selective undercut at gate conductor and gate insulator corner".

Company Profile
0.18.17
  • Jaffe; Mark David - Shelburne VT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Transistor Using Selective Undercut At Gate Conductor And Gate Insulator Corner
App 20180204926 - Abou-Khalil; Michel J. ;   et al.
2018-07-19
SOI-MOSFET gate insulation layer with different thickness
Grant 9,978,849 - Abou-Khalil , et al. May 22, 2
2018-05-22
Transistor Using Selective Undercut At Gate Conductor And Gate Insulator Corner
App 20170186845 - Abou-Khalil; Michel J. ;   et al.
2017-06-29
Double-sided integrated circuit chips
Grant 8,471,306 - Bernstein , et al. June 25, 2
2013-06-25
Double-sided integrated circuit chips
Grant 8,421,126 - Bernstein , et al. April 16, 2
2013-04-16
Structures, design structures and methods of fabricating global shutter pixel sensor cells
Grant 8,138,531 - Adkisson , et al. March 20, 2
2012-03-20
Double-sided Integrated Circuit Chips
App 20110302542 - Bernstein; Kerry ;   et al.
2011-12-08
Double-sided Integrated Circuit Chips
App 20110241082 - Bernstein; Kerry ;   et al.
2011-10-06
Double-sided integrated circuit chips
Grant 8,013,342 - Bernstein , et al. September 6, 2
2011-09-06
Wafer-to-wafer alignments
Grant 8,004,289 - Dalton , et al. August 23, 2
2011-08-23
Double-sided integrated circuit chips
Grant 7,989,312 - Bernstein , et al. August 2, 2
2011-08-02
Dual wired integrated circuit chips
Grant 7,960,245 - Bernstein , et al. June 14, 2
2011-06-14
Dual wired integrated circuit chips
Grant 7,939,914 - Bernstein , et al. May 10, 2
2011-05-10
Structures, Design Structures And Methods Of Fabricating Global Shutter Pixel Sensor Cells
App 20110062542 - Adkisson; James William ;   et al.
2011-03-17
Dual-sided chip attached modules
Grant 7,863,734 - Bernstein , et al. January 4, 2
2011-01-04
Double-sided integrated circuit chips
Grant 7,670,927 - Bernstein , et al. March 2, 2
2010-03-02
Double-sided Integrated Circuit Chips
App 20100044759 - Bernstein; Kerry ;   et al.
2010-02-25
Dual Wired Integrated Circuit Chips
App 20090121287 - Bernstein; Kerry ;   et al.
2009-05-14
Double-sided Integrated Circuit Chips
App 20090121260 - Bernstein; Kerry ;   et al.
2009-05-14
Dual-sided Chip Attached Modules
App 20090065925 - Bernstein; Kerry ;   et al.
2009-03-12
CMOS sensors having charge pushing regions
Grant 7,492,048 - Adkisson , et al. February 17, 2
2009-02-17
Wafer-to-wafer Alignments
App 20080308948 - Dalton; Thomas Joseph ;   et al.
2008-12-18
Dual-sided chip attached modules
Grant 7,462,509 - Bernstein , et al. December 9, 2
2008-12-09
Dual Wired Integrated Circuit Chips
App 20080213948 - Bernstein; Kerry ;   et al.
2008-09-04
Dual Wired Integrated Circuit Chips
App 20080128812 - Bernstein; Kerry ;   et al.
2008-06-05
Dual wired integrated circuit chips
Grant 7,381,627 - Bernstein , et al. June 3, 2
2008-06-03
Dual Wired Integrated Circuit Chips
App 20070267698 - Bernstein; Kerry ;   et al.
2007-11-22
Dual-sided Chip Attached Modules
App 20070267746 - Bernstein; Kerry ;   et al.
2007-11-22
Double-sided Integrated Circuit Chips
App 20070267723 - Bernstein; Kerry ;   et al.
2007-11-22
Dual wired integrated circuit chips
Grant 7,285,477 - Bernstein , et al. October 23, 2
2007-10-23
Cmos Sensors Having Charge Pushing Regions
App 20070158711 - Adkisson; James William ;   et al.
2007-07-12
Wafer-to-wafer Alignments
App 20070132067 - Dalton; Timothy Joseph ;   et al.
2007-06-14
Wafer-to-wafer alignments
Grant 7,193,423 - Dalton , et al. March 20, 2
2007-03-20

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed