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name:-0.061038970947266
name:-0.04485297203064
name:-0.00099515914916992
Jacobson; Neil G. Patent Filings

Jacobson; Neil G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jacobson; Neil G..The latest application filed is for "boundary-scan circuit used for analog an ddigital testing of an integrated circuit".

Company Profile
0.33.1
  • Jacobson; Neil G. - Los Altos CA
  • Jacobson; Neil G. - Mountain View CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Reducing susceptibility of circuit designs to single event upsets
Grant 8,065,644 - Jacobson , et al. November 22, 2
2011-11-22
Identifying bitstream load issues in an integrated circuit
Grant 7,966,534 - Jacobson June 21, 2
2011-06-21
Determining a cycle basis of a directed graph
Grant 7,913,209 - Wu , et al. March 22, 2
2011-03-22
Verifying design isolation using bitstreams
Grant 7,797,651 - Jacobson , et al. September 14, 2
2010-09-14
Identification of multi-device systems
Grant 7,685,327 - Jacobson , et al. March 23, 2
2010-03-23
JTAG to SPI PROM conduit
Grant 7,669,102 - Wennekamp , et al. February 23, 2
2010-02-23
Determining a length of the instruction register of an unidentified device on a scan chain
Grant 7,610,534 - Jacobson October 27, 2
2009-10-27
Method and mechanism for controlling power consumption of an integrated circuit
Grant 7,581,124 - Jacobson , et al. August 25, 2
2009-08-25
Management of configuration data by generating a chain description data set that specifies an order of configuration chain for multi-device systems
Grant 7,546,394 - Jacobson , et al. June 9, 2
2009-06-09
Configuration access from a boundary-scannable device
Grant 7,480,843 - Jacobson January 20, 2
2009-01-20
Monitoring the state vector of a test access port
Grant 7,428,674 - Jacobson September 23, 2
2008-09-23
System and method for overcoming download cable bottlenecks during programming of integrated circuit devices
Grant 7,363,545 - Jacobson , et al. April 22, 2
2008-04-22
Transmitting configuration data to a target programmable device after updating an intermediate programmable device
Grant 7,302,562 - Jacobson , et al. November 27, 2
2007-11-27
Integrated data download
Grant 7,191,372 - Jacobson , et al. March 13, 2
2007-03-13
Network based diagnostic system and method for programmable hardware
Grant 7,133,822 - Jacobson November 7, 2
2006-11-07
Boundary-scan circuit used for analog and digital testing of an integrated circuit
Grant 7,102,555 - Collins , et al. September 5, 2
2006-09-05
Indicating completion of configuration for programmable devices
Grant 7,091,745 - Jacobson August 15, 2
2006-08-15
Method and system for programmable boundary-scan instruction register
Grant 7,073,110 - Jacobson July 4, 2
2006-07-04
Automated boundary-scan chain composition method using a device database and access mechanism for storing and retrieving situation-dependent operation options
Grant 7,023,239 - Jacobson , et al. April 4, 2
2006-04-04
Network based diagnostic system and method for software reconfigurable systems
Grant 7,020,598 - Jacobson March 28, 2
2006-03-28
Conversion of configuration data to match communication protocol
Grant 7,019,558 - Jacobson , et al. March 28, 2
2006-03-28
Boundary-scan Circuit Used For Analog An Ddigital Testing Of An Integrated Circuit
App 20050242980 - Collins, Anthony J. ;   et al.
2005-11-03
System and method for runtime reallocation of PLD resources
Grant 6,915,518 - Jacobson July 5, 2
2005-07-05
Method for concurrently programming a plurality of in-system-programmable logic devices by grouping devices to achieve minimum configuration time
Grant 6,898,776 - Jacobson , et al. May 24, 2
2005-05-24
Automated boundary-scan chain composition method using a device database and access mechanism for storing and retrieving situation-dependent operation options
Grant 6,714,040 - Jacobson , et al. March 30, 2
2004-03-30
Method and circuit for safely reprogramming a logic device
Grant 6,571,382 - Jacobson , et al. May 27, 2
2003-05-27
Intest security circuit for boundary-scan architecture
Grant 6,499,124 - Jacobson December 24, 2
2002-12-24
Boundary-scan register cell with bypass circuit
Grant 6,314,539 - Jacobson , et al. November 6, 2
2001-11-06
System and method for configuration of electronic devices using a smart card which having configuration data stored therein
Grant 6,192,436 - Jacobson , et al. February 20, 2
2001-02-20
Programming method to enable system recovery after power failure
Grant 6,018,250 - Chiang , et al. January 25, 2
2000-01-25
On-chip programming verification system for PLDs
Grant 5,841,867 - Jacobson , et al. November 24, 1
1998-11-24
Overridable data protection mechanism for PLDs
Grant 5,838,901 - Curd , et al. November 17, 1
1998-11-17
Automated control system for programming PLDs
Grant 5,784,577 - Jacobson , et al. July 21, 1
1998-07-21
Processing unit for generating signals for communication with a test access port
Grant 5,694,399 - Jacobson , et al. December 2, 1
1997-12-02

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