loadpatents
name:-0.034600973129272
name:-0.043514966964722
name:-0.015810966491699
Jackson; Bryan L. Patent Filings

Jackson; Bryan L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jackson; Bryan L..The latest application filed is for "event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural network".

Company Profile
14.33.34
  • Jackson; Bryan L. - Fremont CA
  • Jackson; Bryan L. - Oakland CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Yield tolerance in a neurosynaptic system
Grant 11,184,221 - Alvarez-Icaza Rivera , et al. November 23, 2
2021-11-23
Streaming programmable point mapper and compute hardware
Grant 11,144,553 - Berg , et al. October 12, 2
2021-10-12
Event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural network
Grant 11,049,001 - Alvarez-Icaza Rivera , et al. June 29, 2
2021-06-29
Event-based Neural Network With Hierarchical Addressing For Routing Event Packets Between Core Circuits Of The Neural Network
App 20210166107 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2021-06-03
Energy-efficient time-multiplexed neurosynaptic core for implementing neural networks spanning power- and area-efficiency
Grant 10,990,872 - Akopyan , et al. April 27, 2
2021-04-27
Peripheral device interconnections for neurosynaptic systems
Grant 10,984,307 - Akopyan , et al. April 20, 2
2021-04-20
Dual deterministic and stochastic neurosynaptic core circuit
Grant 10,929,747 - Alvarez-Icaza , et al. February 23, 2
2021-02-23
Implementing stochastic networks using magnetic tunnel junctions
Grant 10,832,151 - Jackson , et al. November 10, 2
2020-11-10
Scaling multi-core neurosynaptic networks across chip boundaries
Grant 10,785,745 - Alvarez Icaza Rivera , et al. Sept
2020-09-22
Converting digital numeric data to spike event data
Grant 10,769,519 - Alvarez-Icaza Rivera , et al. Sep
2020-09-08
Converting spike event data to digital numeric data
Grant 10,755,165 - Alvarez-Icaza Rivera , et al. A
2020-08-25
Interconnect circuits at three-dimensional (3-D) bonding interfaces of a processor array
Grant 10,740,282 - Rivera , et al. A
2020-08-11
Coupling parallel event-driven computation with serial computation
Grant 10,678,741 - Jackson , et al.
2020-06-09
Utilizing a distributed and parallel set of neurosynaptic core circuits for neuronal computation and non-neuronal computation
Grant 10,650,301 - Alvarez-Icaza Rivera , et al.
2020-05-12
Yield Tolerance In A Neurosynaptic System
App 20190372831 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2019-12-05
Yield tolerance in a neurosynaptic system
Grant 10,454,759 - Alvarez-Icaza Rivera , et al. Oc
2019-10-22
Peripheral Device Interconnections For Neurosynaptic Systems
App 20190294950 - Akopyan; Filipp A. ;   et al.
2019-09-26
Peripheral device interconnections for neurosynaptic systems
Grant 10,410,109 - Akopyan , et al. Sept
2019-09-10
Event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural network
Grant 10,102,474 - Alvarez-Icaza Rivera , et al. October 16, 2
2018-10-16
Yield Tolerance In A Neurosynaptic System
App 20180287862 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2018-10-04
Dual Deterministic And Stochastic Neurosynaptic Core Circuit
App 20180232634 - Alvarez-Icaza; Rodrigo ;   et al.
2018-08-16
Interconnect Circuits At Three-dimensional (3-d) Bonding Interfaces Of A Processor Array
App 20180189233 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2018-07-05
Yield tolerance in a neurosynaptic system
Grant 9,992,057 - Alvarez-Icaza Rivera , et al. June 5, 2
2018-06-05
Dual deterministic and stochastic neurosynaptic core circuit
Grant 9,984,324 - Alvarez-Icaza , et al. May 29, 2
2018-05-29
Scaling Multi-core Neurosynaptic Networks Across Chip Boundaries
App 20180103448 - Alvarez Icaza Rivera; Rodrigo ;   et al.
2018-04-12
Interconnect circuits at three dimensional (3-D) bonding interfaces of a processor array
Grant 9,940,302 - Alvarez-Icaza Rivera , et al. April 10, 2
2018-04-10
Converting Digital Numeric Data To Spike Event Data
App 20180082173 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2018-03-22
Converting Spike Event Data To Digital Numeric Data
App 20180082174 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2018-03-22
Scaling multi-core neurosynaptic networks across chip boundaries
Grant 9,924,490 - Alvarez Icaza Rivera , et al. March 20, 2
2018-03-20
Converting spike event data to digital numeric data
Grant 9,886,662 - Alvarez-Icaza Rivera , et al. February 6, 2
2018-02-06
Converting digital numeric data to spike event data
Grant 9,881,252 - Alvarez-Icaza Rivera , et al. January 30, 2
2018-01-30
Consolidating multiple neurosynaptic core circuits into one reconfigurable memory block maintaining neuronal information for the core circuits
Grant 9,852,006 - Akopyan , et al. December 26, 2
2017-12-26
Initializing and testing integrated circuits with selectable scan chains with exclusive-OR outputs
Grant 9,797,946 - Alvarez-Icaza Rivera , et al. October 24, 2
2017-10-24
Array of processor core circuits with reversible tiers
Grant 9,792,251 - Alvarez-Icaza Rivera , et al. October 17, 2
2017-10-17
Energy-efficient Time-multiplexed Neurosynaptic Core For Implementing Neural Networks Spanning Power- And Area-efficiency
App 20170286825 - Akopyan; Filipp A. ;   et al.
2017-10-05
Self-timed, event-driven neurosynaptic core controller
Grant 9,747,545 - Akopyan , et al. August 29, 2
2017-08-29
Initializing And Testing Integrated Circuits With Selectable Scan Chains With Exclusive-or Outputs
App 20170199241 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2017-07-13
Streaming Programmable Point Mapper And Compute Hardware
App 20170155698 - Berg; David J. ;   et al.
2017-06-01
Array Of Processor Core Circuits With Reversible Tiers
App 20170124024 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2017-05-04
Dual Deterministic And Stochastic Neurosynaptic Core Circuit
App 20170068885 - Alvarez-Icaza; Rodrigo ;   et al.
2017-03-09
Array of processor core circuits with reversible tiers
Grant 9,588,937 - Alvarez-Icaza Rivera , et al. March 7, 2
2017-03-07
Dual deterministic and stochastic neurosynaptic core circuit
Grant 9,558,443 - Alvarez-Icaza , et al. January 31, 2
2017-01-31
Implementing Stochastic Networks Using Magnetic Tunnel Junctions
App 20160358093 - Jackson; Bryan L. ;   et al.
2016-12-08
Consolidating Multiple Neurosynaptic Core Circuits Into One Reconfigurable Memory Block
App 20160321537 - Akopyan; Filipp A. ;   et al.
2016-11-03
Yield Tolerance In A Neurosynaptic System
App 20160323137 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2016-11-03
Event-based Neural Network With Hierarchical Addressing
App 20160321539 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2016-11-03
Implementing stochastic networks using magnetic tunnel junctions
Grant 9,466,030 - Jackson , et al. October 11, 2
2016-10-11
Coupling Parallel Event-driven Computation With Serial Computation
App 20160267376 - Jackson; Bryan L. ;   et al.
2016-09-15
Coupling Parallel Event-driven Computation With Serial Computation
App 20160267043 - Jackson; Bryan L. ;   et al.
2016-09-15
Interconnect Circuits At Three Dimensional (3-d) Bonding Interfaces Of A Processor Array
App 20160232128 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2016-08-11
Scaling Multi-core Neurosynaptic Networks Across Chip Boundaries
App 20160224889 - Alvarez Icaza Rivera; Rodrigo ;   et al.
2016-08-04
Coupling parallel event-driven computation with serial computation
Grant 9,390,368 - Jackson , et al. July 12, 2
2016-07-12
Interconnect Circuits At Three-dimensional (3-d) Bonding Interfaces Of A Processor Array
App 20160148901 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2016-05-26
Converting Digital Numeric Data To Spike Event Data
App 20160086075 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2016-03-24
Converting Spike Event Data To Digital Numeric Data
App 20160086076 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2016-03-24
Self-timed, Event-driven Neurosynaptic Core Controller
App 20160086077 - Akopyan; Filipp A. ;   et al.
2016-03-24
Peripheral Device Interconnections For Neurosynaptic Systems
App 20160055408 - Akopyan; Filipp A. ;   et al.
2016-02-25
Initializing and testing integrated circuits with selectable scan chains with exclusive-or outputs
Grant 9,244,124 - Alvarez-Icaza Rivera , et al. January 26, 2
2016-01-26
Neuromorphic Hardware For Neuronal Computation And Non-neuronal Computation
App 20150324684 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2015-11-12
Initializing And Testing Integrated Circuits With Selectable Scan Chains With Exclusive-or Outputs
App 20150276867 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2015-10-01
Implementing Stochastic Networks Using Magnetic Tunnel Junctions
App 20150262071 - Jackson; Bryan L. ;   et al.
2015-09-17
Coupling Parallel Event-driven Computation With Serial Computation
App 20150112911 - Jackson; Bryan L. ;   et al.
2015-04-23
Dual Deterministic And Stochastic Neurosynaptic Core Circuit
App 20150039546 - Alvarez-Icaza; Rodrigo ;   et al.
2015-02-05
Array Of Processor Core Circuits With Reversible Tiers
App 20140244971 - Alvarez-Icaza Rivera; Rodrigo ;   et al.
2014-08-28
Photonic device including at least one electromagnetic resonator operably coupled to a state-change material
Grant 7,446,929 - Jayaraman , et al. November 4, 2
2008-11-04

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