Ito; Hironobu
Patent Applications and Registrations
Patent applications and USPTO patent grants for Ito; Hironobu.The latest application filed is for "display device".
- Ito; Hironobu - Aichi JP
- Ito; Hironobu - Tokyo JP
- Ito; Hironobu - Hyogo JP
| Patent | Date |
|---|---|
| Display Device App 20120293960 - Takashima; Hidetoshi ; et al. | 2012-11-22 |
| Digital signal buffer circuit Grant 7,148,726 - Oka , et al. December 12, 2 | 2006-12-12 |
| Digital signal buffer circuit App 20050151565 - Oka, Toshihide ; et al. | 2005-07-14 |
| Input buffer circuit having function of canceling offset voltage Grant 6,873,209 - Takata , et al. March 29, 2 | 2005-03-29 |
| Input buffer circuit having function of canceling offset voltage App 20040227572 - Takata, Kengo ; et al. | 2004-11-18 |
| VLIW processor accepting branching to any instruction in an instruction word set to be executed consecutively Grant 6,615,339 - Ito , et al. September 2, 2 | 2003-09-02 |
| Cache memory control device App 20030028728 - Ito, Hironobu | 2003-02-06 |
| Data Processor App 20010016898 - Ito, Hironobu ; et al. | 2001-08-23 |
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